Two-Stage Baseband Receiver Filtering for Low-Power ADC Input
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Solution Overview
Problem
Existing receiver circuits face challenges with high power consumption and difficulty in maintaining group delay and temperature control in baseband architectures, especially as technology nodes scale down, necessitating frequent calibration and making legacy implementations difficult to port to finer technology modes.
Innovation Solution
A receiver path circuit is designed with a first stage that includes a passive filter and a down-sampler, followed by a second stage with a switched-capacitor circuit, which filters and reduces the frequency of the signal to a level suitable for an ADC, utilizing a local oscillator clock for both stages to minimize power consumption and enable efficient operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a single-stage high-frequency filtering approach is used, then filtering performance is maintained, but power consumption increases and ADC performance degrades
Solution Approach 1:
The filtering function is divided into two separate stages: a first stage that operates at the original high frequency to perform initial filtering, and a second stage that operates at a lower frequency after down-sampling to perform final filtering. This segmentation allows each stage to be optimized for its specific frequency range, reducing overall power consumption while maintaining ADC performance.
2Use of energy by moving object
If signal frequency is reduced for ADC, then power consumption decreases, but filtering performance may be compromised
Solution Approach 1:
The first filtering stage performs preliminary filtering at the original high frequency before down-sampling occurs. This preliminary action removes high-frequency components and prepares the signal for the second stage, ensuring that filtering performance is maintained even though the second stage operates at a lower frequency for power efficiency.
3Device complexity
If legacy baseband architecture is used, then design is simpler, but calibration is frequent and portability to finer technology modes is difficult
Solution Approach 1:
The baseband architecture incorporates dynamic elements including a down-sampler that adapts the sampling rate and a two-stage filtering system that can be configured for different operating conditions. This dynamic design allows the system to be ported to finer technology nodes and adapted to different application requirements without requiring complete redesign, improving versatility while maintaining reasonable complexity.
Data Source
AI summary
A receiver path circuit includes a first stage, a down-sampler and a second stage. The first stage is configured to filter a mixer-output-signal received from a mixer and provide a first-stage-output-signal. The down-sampler is configured to down-sample the first-stage-output-signal to provide a transition-signal having a transition-frequency. The transition-frequency is lower than the frequency of the first-stage-output-signal. The second stage includes a switched-capacitor circuit that is configured to filter and reduce the frequency of the transition-signal in order to provide a second-stage-output-signal to an ADC.