High-Speed Baseband-RFIC Interface for Fast AGC Convergence
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Solution Overview
Problem
Current wireless communication systems face challenges in implementing automatic gain control (AGC) across base-band and radio frequency integrated circuit (RFIC) components, particularly in achieving high-speed and efficient gain adjustments for multiple wireless standards like 5G NR and Wi-Fi, which requires complex and power-consuming separate hardware blocks.
Innovation Solution
A unified hardware system with a high-speed interface between baseband and RFIC using a serial protocol over low-voltage differential signaling (LVDS) channels, enabling fast and efficient AGC implementation by integrating a signal processing unit with an RF controller and amplifier, and utilizing a software-assisted hardware finite-state machine for gain control, allowing for simultaneous processing of multiple radio access technologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate hardware blocks are provided for each radio standard, then each standard can be processed independently, but hardware complexity and power consumption increase
Solution Approach 1:
The patent merges multiple radio standard processing capabilities into a single unified hardware block that can simultaneously handle 4G LTE, 5G NR, and Wi-Fi signals. This consolidation reduces the number of separate hardware blocks needed while maintaining support for multiple standards through a shared processing architecture with standardized interfaces.
Solution Approach 2:
The unified hardware block is designed with universal processing capabilities that can adapt to different radio standards through configurable parameters and standardized interfaces. The block performs multiple functions (processing different wireless standards) using a single multi-functional unit rather than dedicated separate blocks for each standard.
2Adaptability or versatility
If separate hardware blocks are provided for each radio standard, then each standard can be processed independently, but power consumption increases
Solution Approach 1:
By merging multiple standard processing functions into a single hardware block, the patent eliminates redundant processing circuits and power consumption associated with running multiple separate blocks. The unified block shares common resources such as ADCs, DSP units, and memory, reducing overall power consumption while maintaining multi-standard support.
3Reliability
If AGC is implemented across separate RF and base-band ICs, then gain control can be achieved, but interface speed and convergence time increase
Solution Approach 1:
The patent integrates RF and base-band processing functions into a single unified hardware block, eliminating the need for high-speed interfaces between separate ICs. This integration reduces communication latency and enables faster AGC convergence by allowing direct, real-time coordination between RF gain control and base-band signal processing within the same hardware architecture.
4Device complexity
If unified hardware is used for multiple wireless standards, then hardware complexity is reduced, but resource flexibility may be compromised
Solution Approach 1:
The unified hardware block incorporates dynamic resource allocation mechanisms that can adaptively configure processing resources based on the active radio standard and signal conditions. This dynamic reconfiguration capability maintains resource flexibility while using a single hardware block, allowing the system to optimize performance for different standards without requiring separate dedicated hardware for each.
Data Source
AI summary
With advanced compute capabilities and growing convergence of wireless standards, it is desirable to run multiple wireless standards, e.g., 4G, 5G NR, and Wi-Fi, on a single signal processing system. Automatic gain control (AGC) is a process of converging on a gain level for optimum signal reception considering the dynamic range of all the components in the receive chain, including analog and digital parts. For certain wireless standard such as Wi-Fi, AGC is required to complete within a short interval. Both RF and baseband gains have to be adjusted within this short time. Discloses in the present disclosure are embodiments of a high-speed and low pin-count interface between an RF circuit and a baseband circuit for AGC communication. The high-speed interface provides a light-weight serial protocol over one or more low-voltage differential signaling (LVDS) channels to meet a low-latency requirement for gain updates.