Batch Chip Transfer by Photoelectric Sorting and Adhesion Control
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Solution Overview
Problem
The existing chip sorting process for semiconductor chips, particularly light-emitting-diode (LED) chips, is inefficient due to the time-consuming travel of robots between wafers and bin tables, taking approximately three hours to categorize 40,000 chips, which affects manufacturing efficiency.
Innovation Solution
A chip transferring method involving a first load-bearing structure for fixing chips, photoelectric characteristic value measurement, categorization into qualified and unqualified portions, and a transfer mechanism using adhesion differences between load-bearing structures to perform single-batch transfers of qualified chips to a second structure, enhancing transfer yield through adhesion manipulation and peptization processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a robot sorter is used to pick and put chips one by one, then chip categorization can be completed with simple equipment, but the transfer time becomes extremely long (about three hours for 40,000 chips)
Solution Approach 1:
The patent divides the chip transfer process into segments by introducing intermediate transfer structures and multiple transfer stations. Instead of one-by-one picking, chips are transferred in batches using segmented transfer paths with multiple load-bearing structures working in parallel, dramatically reducing total transfer time while maintaining categorization capability.
Solution Approach 2:
The patent combines multiple chip transfer operations into a single batch process. By merging the transfer of multiple chips into one coordinated action using synchronized load-bearing structures, the system achieves parallel processing of chip categorization, increasing productivity from 4 chips/second to handling thousands of chips simultaneously.
2Manufacturing precision
If chips are transferred one by one using a robot, then precise positioning can be achieved, but the manufacturing efficiency deteriorates significantly
Solution Approach 1:
The patent implements preliminary positioning of chips on the first load-bearing structure before transfer. Chips are pre-aligned and grouped into batches on the source structure, then transferred as complete units to destination structures. This preliminary organization maintains positioning accuracy while enabling batch processing, thus improving manufacturing efficiency without sacrificing precision.
Solution Approach 2:
The patent introduces intermediate load-bearing structures as mediators between the source wafer and final destination. These intermediary structures serve as temporary holding and transfer platforms that maintain chip positioning while enabling batch transfers, acting as buffers that preserve precision during the efficiency-enhancing batch process.
3Loss of time
If multiple transfer structures are used for batch transfer, then transfer speed increases significantly, but the device complexity increases
Solution Approach 1:
The patent designs the load-bearing structures with multi-functionality, where each structure can serve as source, destination, or intermediate transfer point depending on the process stage. The same basic structure type is reused throughout the system with different positioning, reducing the need for specialized components and managing complexity while maintaining batch transfer capability.
Solution Approach 2:
The patent implements dynamic coordination of multiple transfer structures through synchronized movement and positioning. The system dynamically assigns roles to different load-bearing structures based on real-time process needs, with structures moving between stationary and moving states in coordinated sequences, optimizing transfer speed while managing system complexity through controlled dynamics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method significantly reduces transfer time by enabling simultaneous batch transfer of qualified chips, improving manufacturing efficiency and accuracy, allowing for rapid categorization and sorting of LED chips based on photoelectric characteristics.
Implementation Method 1
the transfer yield can be enhanced by a peptization process reducing the adhesion between the first load-bearing structure and the plurality of chips
Data Source
AI summary
A chip transferring method includes steps of: providing a plurality of chips on a first load-bearing structure; measuring photoelectric characteristic values of the plurality of chips; categorizing the plurality of chips into a first portion of the plurality of chips and a second portion of the plurality of chips according to the photoelectric characteristic values of the plurality of chips, wherein the second portion of the plurality of chips comprise parts of the plurality of chips which photoelectric characteristic value falls within an unqualified range; removing the second portion of the plurality of chips from the first load-bearing structure; dividing the first portion of the plurality of chips into a plurality of blocks, wherein each of the plurality of blocks comprising multiple chips of the first portion of the plurality of chips; and transferring the first portion of the plurality of chips in one of the plurality of blocks to a second load-bearing structure in single-batch.