Secondary Battery Circuit Chip Integration
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Solution Overview
Problem
Existing methods for manufacturing secondary battery-mounted circuit chips face challenges in downsizing the solid thin film secondary battery while maintaining its functionality and integrating it with a semiconductor substrate without damaging the circuit chip, as conventional high-temperature processes can break the circuit chip.
Innovation Solution
A secondary battery-mounted circuit chip is developed where the secondary battery is formed on the surface or rear surface of the circuit chip, with electrodes connected via wiring layers and via holes, allowing for a thin, integrated structure that avoids high-temperature processes and uses a quantum battery fabricated at 400°C or lower, enabling space-saving and functional integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional high-temperature processes are used to manufacture solid thin film secondary batteries, then the battery can be formed with sufficient power capacity, but the circuit chip is damaged and broken
Solution Approach 1:
The patent changes the temperature parameter from conventional high-temperature processes to low-temperature processes (400°C or lower), enabling the formation of solid thin film secondary batteries without damaging the circuit chip. This parameter change resolves the contradiction between achieving sufficient battery power capacity and maintaining circuit chip integrity.
2Volume of moving object
If the secondary battery is downsized to fit smaller devices, then packaging space is reduced, but the power capacity becomes insufficient
Solution Approach 1:
The patent uses composite material structures including porous films as anode active materials and solid electrolyte films, achieving high power capacity density in a compact form factor. This allows the battery to be downsized while maintaining sufficient power capacity through optimized material composition and structure.
Solution Approach 2:
The patent employs porous films as anode active materials, which provide high surface area to volume ratio and enhanced ion transport pathways. This porous structure enables the battery to achieve sufficient power capacity in a reduced volume, resolving the contradiction between downsizing and maintaining power capacity.
3Device complexity
If the secondary battery is formed directly on the circuit chip, then integration is achieved and space is saved, but the manufacturing process becomes more complex
Solution Approach 1:
The patent merges the secondary battery formation process with the circuit chip manufacturing process, forming the battery directly on the chip surface. This integration eliminates separate battery mounting steps and achieves space savings while the low-temperature process ensures compatibility with existing circuit fabrication techniques.
4Length of moving object
If a thin film lithium-ion secondary battery is used, then the device can be downsized for micro-size applications, but the manufacturing process requires precise control to avoid damaging the circuit
Solution Approach 1:
The patent changes the temperature parameter to 400°C or lower, which provides a wider process window and reduces the risk of circuit damage during battery formation. This parameter adjustment enhances manufacturing precision and makes the process more controllable for micro-size device fabrication.
Data Source
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AI summary
There are provided a secondary battery-mounted circuit chip in which a secondary battery is directly fabricated on an opposed surface of a formed circuit into an integrated structure of the secondary battery and the circuit, and a manufacturing method thereof. A secondary battery-mounted circuit chip is configured such that a secondary battery is directly fabricated in a region corresponding to a circuit into an integrated structure of the secondary battery and the circuit. The chip is a secondary battery-mounted circuit chip in which the secondary battery is formed on a surface opposing a circuit region fabricated on a wafer. The secondary battery and the circuit are formed into the integrated structure by forming the uppermost part of the circuit having multilayer wiring into a secondary battery structure on the upper part of the circuit surface subjected to passivation, forming the secondary battery directly stacked by making the uppermost wiring layer of the multilayer wiring part of the circuit in a surface structure to be used in common, or forming the secondary battery on the rear surface of the substrate having the circuit formed thereon.