Battery PCB FET Layout for Uniform Current Sharing
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Solution Overview
Problem
Power supply devices with secondary battery cells and semiconductor elements mounted on a circuit board face uneven current distribution due to structural restrictions, leading to thermal destruction of elements.
Innovation Solution
A power supply device configuration with semiconductor elements connected in parallel and series, featuring current impeding regions with varying electrical resistances and thermal vias to manage current flow and heat distribution, ensuring uniform heating of elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If semiconductor elements are arranged in a limited area on the circuit board to meet structural restrictions, then device compactness is improved, but current distribution becomes uneven causing thermal destruction
Solution Approach 1:
The patent applies local quality by introducing current impeding regions with different electrical resistances at specific locations on the circuit board. These regions have higher electrical resistance to reduce current density in areas where current concentration occurs, thereby achieving uniform current distribution across semiconductor elements while maintaining compact device structure.
2Reliability
If current impeding regions with different electrical resistances are introduced to balance current distribution, then current uniformity is improved, but circuit complexity increases
Solution Approach 1:
The patent merges the current impeding regions directly into the circuit board structure itself, rather than adding separate external components. The circuit board integrates both current conduction paths and current impeding regions with different electrical resistances, combining multiple functions into a single component to reduce overall circuit complexity while maintaining current distribution uniformity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses current concentration and prevents excessive heating of semiconductor elements, ensuring uniform heat generation and extending their lifespan.
Implementation Method 1
A first current path connecting the first semiconductor element and the second semiconductor element in series to each other is longer than a second current path connecting the third semiconductor element and the fourth semiconductor element in series to each other. The first current path includes a first current impeding region configured to impede current flow. The second current path includes a second current impeding region configured to impede current flow. A second electrical resistance of the second current impeding region is higher than a first electrical resistance of the first current impeding region.
Implementation Method 2
the FETs are arranged such that current is likely to concentrate on parts of the FETs may provide a problem that the current is unevenly distributed to the parts of the FETs and exceeds the current rating of elements, resulting in thermal destruction of the element
Data Source
AI summary
Uneven distribution of current is suppressed even in a condition that semiconductor elements are mounted in a limited area on a circuit board. A power supply device includes a secondary battery cell, charging/discharging FETs, and a circuit board including a first terminal block and a second terminal block. A first charging/discharging FET and a third charging/discharging FET are disposed at a side of the first terminal block on circuit board. A second charging/discharging FET and a fourth charging/discharging FET are disposed at a side of the second terminal block on circuit board. A first current path connecting the first charging/discharging FET in series to the second charging/discharging FET is longer than a second current path connecting the third charging/discharging FET in series to the fourth charging/discharging FET. The first current path includes a first current impeding region configured to impede current flow. The second current path includes a second current impeding region configured to impede current flow. A second electrical resistance of the second current impeding region is higher than a first electrical resistance of the first current impeding region.