Bulk Acoustic Wave Resonator with Protected Cavity Etching

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Solution Overview

Problem

Conventional methods for manufacturing bulk acoustic wave resonators, such as physical vapor deposition (PVD) or chemical vapor deposition (CVD), cannot deposit lithium niobate crystal or lithium tantalate crystal, and traditional deposition methods often result in undesired conductive channels and electrode damage during the etching process, affecting the resonator's performance.

Innovation Solution

A method involving a piezoelectric substrate with a cleavage plane defined by ion implantation, followed by annealing to split the substrate, forming a piezoelectric layer, and using passivation layers to protect electrodes during etching, along with a barrier layer to prevent charge accumulation, to create a bulk acoustic wave resonator with improved performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional deposition methods (PVD or CVD) are used to form a piezoelectric layer, then the manufacturing process is simple and conventional, but lithium niobate crystal or lithium tantalate crystal cannot be deposited, limiting the piezoelectric properties of the resonator

Engineering Contradiction:
Improvepiezoelectric propertiesVSAvoiddeposition process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

A sacrificial substrate (second substrate) is introduced as an intermediary carrier to enable the formation of lithium niobate or lithium tantalate piezoelectric layers. The piezoelectric layer is formed on the sacrificial substrate which can be later removed, allowing materials that cannot be directly deposited on the final substrate structure. This mediator enables the use of high-quality piezoelectric crystals while maintaining manufacturing feasibility.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The manufacturing process is segmented into distinct stages: forming the piezoelectric layer on a sacrificial substrate, building the resonator structure, and then removing the sacrificial substrate. This segmentation allows the piezoelectric layer to be formed under optimal conditions on the sacrificial substrate without contamination or damage from subsequent processing steps on the final device structure.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If the etching process is performed without protective layers, then the resonant cavity can be formed, but electrodes on the piezoelectric layer are exposed to the etching process and thus be damaged

Engineering Contradiction:
Improvecavity formationVSAvoidelectrode integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

Passivation layers are formed on the electrodes before the etching process to protect them. This preliminary protective action ensures that when the etching process is subsequently performed to form the resonant cavity, the electrodes remain intact and undamaged. The passivation layers are later removed after serving their protective function.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The passivation layers act as a cushioning protective barrier that is applied beforehand to shield the electrodes from the harmful effects of the etching process. This prior protection prevents direct exposure of the electrodes to etchants, thereby preventing damage while still allowing the cavity to be formed.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Ease of manufacture

If no barrier layer is provided on the substrate surface, then the manufacturing process is simpler, but an undesired conductive channel due to charge accumulation may be generated on the surface of base substrate

Engineering Contradiction:
Improveprocess simplicityVSAvoidconductive channel formation
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The harmful effect of charge accumulation on the substrate surface is extracted and isolated by introducing a barrier layer. This barrier layer specifically addresses and prevents the formation of undesired conductive channels by blocking charge accumulation at the substrate surface, while the rest of the manufacturing process remains relatively simple.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method allows for the formation of a bulk acoustic wave resonator with enhanced piezoelectric properties using lithium niobate or lithium tantalate, reducing RF loss and improving the quality factor and bandwidth, while preventing electrode damage and conductive channel formation.

Implementation Method 1

a piezoelectric layer having piezoelectric property is generally formed on a substrate

Methodology Applied
Scientific EffectPiezoelectric effect: Piezoelectric Effect

Implementation Method 2

performing an ion implantation process on the piezoelectric substrate to define a cleavage plane

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 3

performing an annealing process on the piezoelectric substrate, such that the piezoelectric substrate is split along the cleavage plane

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS11838001B2Bulk acoustic wave resonator and method of manufacturing the same
Publication Date: 2023.12.05 SHENZHEN NEWSONIC TECH CO LTD
  • US11838001B2 patent drawing
  • US11838001B2 patent drawing
  • US11838001B2 patent drawing

AI summary

A bulk acoustic wave resonator and a method of manufacturing the same are provided. The bulk acoustic wave resonator includes: a first carrier substrate; a barrier layer on a main surface of the first carrier substrate and configured to prevent an undesired conductive channel from being generated due to charge accumulation on the main surface; a buffer layer on a side of the barrier layer away from the first carrier substrate; a piezoelectric layer on a side of the buffer layer away from the barrier layer; a first electrode and a second electrode on opposite sides of the piezoelectric layer; a first passivation layer and a second passivation layer, respectively covering sidewalls of the first electrode and the second electrode; a dielectric layer between the first passivation layer and the buffer layer, wherein a first cavity is provided between the first passivation layer and the dielectric layer.