BBUL Substrate Routing With Embedded Interconnect Bridge
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Solution Overview
Problem
Current substrate routing in semiconductor devices is of lower density than the routing in attached chips, leading to increased system board area, power loss, complexity, component count, and cost, and the use of silicon interposers adds additional costs and yield loss.
Innovation Solution
Incorporating a high density interconnect element, such as a silicon or glass die interconnect bridge, into the bumpless buildup layer (BBUL) substrate to electrically couple multiple embedded dice, allowing for localized high density interconnects and reducing the need for first-level interconnects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional substrate routing is used, then manufacturing is simpler, but interconnect density is lower
Solution Approach 1:
The substrate is divided into multiple routing layers with different density characteristics. High density routing is implemented in specific regions using advanced techniques while lower density routing is used in other areas, allowing the system to achieve high overall interconnect density without requiring the entire substrate to use complex high-density techniques throughout.
Solution Approach 2:
Different routing density approaches are applied to different regions of the substrate based on local requirements. Areas requiring high signal throughput or close component spacing utilize high density routing techniques, while other areas use standard routing, optimizing the balance between interconnect density and manufacturing complexity.
2Productivity
If high density interconnects are used, then routing efficiency is improved, but manufacturing complexity increases
Solution Approach 1:
High density interconnect techniques are applied partially only where needed rather than uniformly across the entire substrate. This allows routing efficiency to be improved in critical areas without incurring the full manufacturing complexity cost across the entire device.
Solution Approach 2:
The routing density parameter is varied across different regions of the substrate, transitioning from standard density to high density where required. This parameter change allows optimization of routing efficiency in specific areas while maintaining manufacturing feasibility through gradual transitions and standardized process integration.
3Quantity of substance
If silicon interposers are used, then interconnect density is enhanced, but cost and yield loss increase
Solution Approach 1:
The high density interconnect functionality is extracted from the traditional silicon interposer and integrated directly into the substrate structure. This eliminates the need for separate silicon interposer components, reducing the number of assembly steps and potential failure points while maintaining the desired interconnect density.
Solution Approach 2:
The interconnect functions previously separated into distinct silicon interposer components are merged into a unified substrate structure. This integration reduces the total component count, simplifies the assembly process, and improves yield by eliminating additional bonding and alignment steps associated with separate interposer attachment.
Data Source
AI summary
Discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. In one or more embodiments a device can include a bumpless buildup layer (BBUL) substrate including a first die at least partially embedded in the BBUL substrate, the first die including a first plurality of high density interconnect pads. A second die can be at least partially embedded in the BBUL substrate, the second die including a second plurality of high density interconnect pads. A high density interconnect element can be embedded in the BBUL substrate, the high density interconnect element including a third plurality of high density interconnect pads electrically coupled to the first and second plurality of high density interconnect pads.