BBUL Substrate Routing With Embedded High-Density Interconnects
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Solution Overview
Problem
Current semiconductor devices face challenges with substrate routing of lower density compared to chip routing, leading to increased size, cost, and complexity due to inefficient use of space and higher costs associated with silicon interposers.
Innovation Solution
Incorporating a high density interconnect element, such as a silicon or glass die interconnect bridge, within a bumpless buildup layer (BBUL) substrate to enhance local routing and interconnect density, reducing the need for first-level interconnects and panel processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional substrate routing is used, then manufacturing is simpler, but interconnect density is lower
Solution Approach 1:
The substrate is divided into multiple routing layers with different density characteristics. High density interconnect elements are embedded in specific buildup layers while other layers maintain traditional substrate routing, allowing localized high density without requiring the entire substrate to be complex.
Solution Approach 2:
High density interconnect elements are selectively embedded in specific buildup layers where high routing density is required, while other areas of the substrate maintain traditional lower density routing. This allows the substrate to have different routing densities in different locations based on local requirements.
2Quantity of substance
If silicon interposers are used to increase interconnect density, then routing capacity improves, but cost increases
Solution Approach 1:
The patent uses standard substrate materials and conventional manufacturing processes instead of expensive silicon interposers. High density interconnect elements are embedded directly in the substrate's buildup layers using existing semiconductor fabrication techniques, avoiding the need for costly silicon interposer materials and specialized manufacturing.
Solution Approach 2:
The invention replicates the high density interconnect functionality that would otherwise require silicon interposers by embedding conductive elements directly in the substrate. This creates a cost-effective copy of the interposer functionality using standard substrate manufacturing processes.
3Quantity of substance
If high density interconnect elements are embedded in buildup layers, then local routing density increases, but manufacturing complexity increases
Solution Approach 1:
High density interconnect elements are embedded in the buildup layers during the substrate fabrication process before final assembly. This preliminary embedding allows the high density routing structure to be created as part of the standard manufacturing flow, avoiding additional complex assembly steps after substrate completion.
Solution Approach 2:
The embedding of high density interconnect elements is merged with the existing substrate fabrication process. The conductive elements are integrated into the buildup layers during standard manufacturing operations, combining the high density routing creation with常规 substrate production rather than requiring separate manufacturing steps.
Data Source
AI summary
Discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. In one or more embodiments a device can include a bumpless buildup layer (BBUL) substrate including a first die at least partially embedded in the BBUL substrate, the first die including a first plurality of high density interconnect pads. A second die can be at least partially embedded in the BBUL substrate, the second die including a second plurality of high density interconnect pads. A high density interconnect element can be embedded in the BBUL substrate, the high density interconnect element including a third plurality of high density interconnect pads electrically coupled to the first and second plurality of high density interconnect pads.