Benzocyclobutene 3D Interconnects Eliminate TSV Stress
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Solution Overview
Problem
Conventional 3D integrated circuit technologies face challenges such as limited interconnection density, thermomechanical reliability issues, and device failure due to strained silicon and imperfect through-silicon vias, while also being limited to vertical integration in a single direction.
Innovation Solution
A multi-layer electronic circuit construct using benzocyclobutene (BCB) layers, which allows for the formation of three-dimensional integrated circuits with vertical and lateral integration capabilities, eliminating the need for conventional through-silicon vias and wirebondings, and enabling high-density interconnection and packaging of diverse technological origin components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through-silicon via (TSV) technology is used to enable three-dimensional stacked devices, then interconnection between layers is achieved, but thermomechanical reliability problems occur due to TSV-induced stress
Solution Approach 1:
The patent removes the TSV structure from the system entirely, replacing it with a BCB-based interconnection approach. By extracting the problematic TSV component that causes stress concentration and reliability issues, the invention achieves reliable three-dimensional stacking without the harmful stress effects
Solution Approach 2:
The patent changes the material parameter from silicon-based TSV to benzocyclobutene (BCB) organic material. This material substitution fundamentally alters the mechanical and thermal properties, eliminating the stress concentration problems associated with rigid TSV structures while maintaining effective interconnection
2Quantity of substance
If conventional photo-masking and trace printing on silicon substrates is used, then individual circuit layers are formed, but interconnection density is limited
Solution Approach 1:
The patent transitions from planar two-dimensional circuit formation to three-dimensional vertical stacking using BCB layers. By adding the vertical dimension with multiple BCB layers that can be selectively etched and interconnected, the system achieves high interconnection density through spatial optimization in three dimensions
Solution Approach 2:
The patent divides the circuit into multiple discrete BCB layers that can be independently formed, patterned, and interconnected. Each BCB layer serves as a separate interconnection plane, allowing high-density routing without the complexity constraints of conventional single-layer silicon substrate approaches
3Area of stationary object
If vertical stacking of circuit layers is implemented, then motherboard space is minimized, but integration is limited to a single direction
Solution Approach 1:
The BCB-based interconnection system provides universal connectivity capabilities in multiple directions (vertical stacking and lateral integration). The same BCB material and processing techniques enable both vertical and horizontal interconnections, making the system adaptable to diverse integration architectures without requiring separate specialized structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The BCB-based 3D package provides a robust and reliable integration of multiple components in various directions, enhancing interconnection density and reducing thermomechanical stress, while allowing for cost-effective manufacturing and diverse applications in electronic devices.
Implementation Method 1
initially heating said construct for a time selected to partially cure said first BCB layer to a 45% to 75%, and preferably about a 60% fully cured states
Data Source
AI summary
An integrated circuit includes stacked benzocyclobutene layers and a circuit geometry comprising conductive electric traces and interconnects on and/or extending through the BCB layers. A first said BCB layer formed and partially cured state. A top surface masked with photoresist, and after exposure, etched selectively form through vias at locations corresponding to conductive interconnects of the circuit geometry associated with said first BCB layer. A further mask coating is applied and after exposure, conductive metal is deposited to infill vias and form the electric traces of the circuit geometry. Subsequent BCB layers are then likewise formed, etched masked and coated in the same manner.