Stepped STI Trenches for BCD Isolation and Hot Carrier Suppression

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Solution Overview

Problem

Integrating different types of components in BCD devices that operate at different voltages poses challenges in electrical isolation, leading to increased impact ionization and reduced device performance and reliability.

Innovation Solution

The formation of shallow trench isolation (STI) regions with a stepped profile in power device regions, utilizing a method that includes patterning mask segments, etching trenches, and depositing isolation material to enhance immunity to impact ionization, while maintaining compatibility with CMOS technology process flows.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If shallow trench isolation regions are formed in power device regions to provide electrical isolation, then device reliability is improved, but impact ionization increases due to the standard trench profile

Engineering Contradiction:
Improvedevice reliabilityVSAvoidimpact ionization
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies dimensionality change by transitioning from a standard vertical trench profile to a stepped trench profile with multiple depth levels. The stepped profile creates different vertical dimensions within the isolation region, allowing the first portion to extend deeper than the second portion. This dimensional variation reduces impact ionization by distributing the electric field more effectively across different depth zones while maintaining electrical isolation between adjacent devices.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The isolation trench is segmented into multiple portions at different depth levels, with each portion serving a specific function in reducing impact ionization. The first portion extends to a first depth level while the second portion extends to a second depth level, creating a segmented structure that breaks up the continuous electric field path and reduces peak electric field intensity that causes impact ionization.

Inventive Principle:
Principle #1Segmentation

2Reliability

If complex isolation structures are implemented to reduce impact ionization, then device performance is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvedevice performanceVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The stepped profile is formed during the trench creation process itself through preliminary patterning and etching steps, rather than requiring additional post-processing. The trench is etched with the stepped profile predetermined by the masking pattern, and the isolation material is then deposited to fill this pre-formed stepped structure. This preliminary action integrates the complexity into the existing fabrication sequence without requiring separate dedicated steps for profile formation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent merges the isolation formation process with the existing trench etching and filling steps in the fabrication sequence. The stepped profile is combined with the standard isolation material deposition and planarization steps, so that the complex profile is achieved through integration with rather than addition to, the existing manufacturing process flow.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12471356B2Stepped isolation regions
Publication Date: 2025.11.11 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12471356B2 patent drawing
  • US12471356B2 patent drawing
  • US12471356B2 patent drawing

AI summary

Provided are device with stepped isolation regions and methods for fabricating the same. An exemplary method includes forming mask segments over a semiconductor material; etching the semiconductor material to form first trenches, wherein the first trenches have a first trench maximum width and a first trench depth; forming a coating in the first trenches, wherein the coating has a coating depth less than the first trench depth, and wherein uncovered portions of the semiconductor material extend from the coating to the patterned masks; performing an etch process to etch the mask segments and the uncovered portions of the semiconductor material to form second trenches over the first trenches, wherein the second trenches have a second minimum width greater than the first maximum width and a second depth less than the first depth; and removing the coating from the first trenches.