BCD and UHV Transistor Integration via Segmented Buried Layers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The integration of bipolar-complementary metal oxide semiconductor (CMOS)-double diffused metal oxide semiconductor (DMOS) (BCD) transistors and ultra-high voltage (UHV) transistors on the same semiconductor device is hindered by latch-up effects and breakdown voltage issues due to shared semiconductor substrates, where the BCD transistor's buried layer can cause short circuits and UHV transistor failure.
Innovation Solution
A semiconductor device is manufactured by dividing the substrate into regions, using a patterned mask to form a buried layer in the BCD transistor region with higher dopant concentration than the substrate, preventing latch-up and ensuring the buried layer does not extend to the UHV transistor region, thus maintaining its breakdown voltage and preventing failure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a buried layer is formed in the BCD transistor region to prevent latch-up effect, then the reliability of BCD transistor is improved, but the breakdown voltage of UHV transistor deteriorates due to extension of the buried layer into the UHV region
Solution Approach 1:
The semiconductor substrate is divided into a first region for BCD transistors and a second region for UHV transistors. A patterned mask is used to selectively form a buried layer only in the first region, preventing the buried layer from extending into the second region. This segmentation allows the BCD region to benefit from latch-up prevention while the UHV region maintains its breakdown voltage characteristics.
Solution Approach 2:
Different regions of the semiconductor substrate are given different structures tailored to their specific requirements. The first region contains a buried layer with higher dopant concentration optimized for preventing latch-up in BCD transistors, while the second region maintains the original substrate structure optimized for high breakdown voltage in UHV transistors. This local quality differentiation resolves the contradiction between the two competing requirements.
2Productivity
If BCD and UHV transistors are integrated on the same semiconductor device to save packaging costs and reduce power consumption, then the system performance is improved, but the manufacturing complexity increases due to conflicting structural requirements
Solution Approach 1:
The device is segmented into distinct functional regions (first region for BCD, second region for UHV) with different structural characteristics. This segmentation allows each region to be optimized independently while being manufactured together on the same substrate, reducing the complexity of managing two separate devices while maintaining the benefits of integration.
Solution Approach 2:
A patterned mask serves as an intermediary tool that enables selective formation of the buried layer. This mask acts as a mediator between the conflicting requirements of BCD and UHV regions, allowing the manufacturing process to accommodate both types of transistors on the same substrate without requiring completely separate fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows successful integration of BCD and UHV transistors on the same device, preventing latch-up effects and increasing breakdown voltage, thereby enhancing the performance and reliability of the semiconductor device.
Implementation Method 1
The patterned mask is utilized to perform a doping process on the first region, such that a buried layer is formed in the first region. The buried layer has the same conductivity type as the semiconductor substrate, and the buried layer has a dopant concentration that is greater than that of the semiconductor substrate.
Implementation Method 2
A patterned mask covering the second region is formed before an epitaxial process is performed.
Data Source
AI summary
A semiconductor device includes a semiconductor substrate having a first conductivity type, wherein the semiconductor substrate includes a first region and a second region. The semiconductor device also includes a buried layer disposed in the first region of the semiconductor substrate and having the first conductivity type, wherein the buried layer has a dopant concentration that is greater than that of the semiconductor substrate. The semiconductor device further includes an epitaxial layer disposed on the semiconductor substrate, and a first element disposed on the first region of the semiconductor substrate, wherein the first element includes a bipolar-complementary metal oxide semiconductor (CMOS)-double diffused metal oxide semiconductor (DMOS) (BCD) transistor. In addition, the semiconductor device includes a second element disposed on the second region of the semiconductor substrate, wherein the second element includes an ultra-high voltage (UHV) transistor.