Back-Channel Etch Transistor Hard-Mask Patterning
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Solution Overview
Problem
In the fabrication process of Back Channel Etch (BCE) type oxide semiconductor thin film transistors, the direct contact between the photoresist and the channel layer, which contains organic solvent, compromises the electrical properties and stability of the transistors due to its impact on the Subthreshold Swing (SS).
Innovation Solution
A fabrication method is developed where a patterned hard-mask layer is used to prevent direct contact between the photoresist and the channel layer, involving the formation of a gate electrode, gate insulating layer, patterned channel layer, and patterned hard-mask layers, with the hard-mask layer being etched using a wet etchant to expose the channel layer, ensuring the channel layer is not in direct contact with the photoresist.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photoresist is used for patterning the channel layer in BCE type oxide semiconductor TFTs, then the channel layer can be patterned, but the organic solvent in the photoresist damages the channel layer and compromises electrical properties and stability
Solution Approach 1:
A hard mask layer is introduced as an intermediary between the photoresist and the channel layer. The photoresist patterns the hard mask layer instead of directly contacting the channel layer, while the hard mask layer subsequently patterns the channel layer through wet etching. This mediator prevents direct contact between the photoresist's organic solvent and the channel layer, preserving electrical properties while enabling precise patterning.
2Manufacturing precision
If photoresist directly contacts the channel layer, then patterning can be achieved, but the Subthreshold Swing (SS) is degraded
Solution Approach 1:
The hard mask layer serves as a protective intermediary that the photoresist patterns through standard lithography. The patterned hard mask then defines the channel layer through selective wet etching. This two-step approach maintains the Subthreshold Swing by preventing photoresist solvent damage while achieving the required patterning precision.
3Reliability
If a hard-mask layer is introduced to protect the channel layer, then electrical properties improve, but the fabrication process complexity increases
Solution Approach 1:
The hard mask layer formation is merged with the existing patterning process flow. The photoresist is applied and patterned on the hard mask layer in the same lithography step, and the subsequent wet etching simultaneously removes both the photoresist and defines the channel layer through the hard mask. This integration minimizes additional process steps while protecting electrical properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method improves the subthreshold swing and stability of the transistors by preventing damage from organic solvents in the photoresist, resulting in better electrical properties and stability compared to conventional BCE TFTs.
Implementation Method 1
a part of the hard-mask that is not covered by the source and the drain is removed by the wet etchant until the patterning channel layer is exposed
Data Source
AI summary
A method for fabricating a transistor including the following steps is provided. First, a gate electrode is formed on a substrate, and a gate insulating layer is formed on the substrate in sequence, wherein the gate insulating layer covers the substrate and the gate electrode. Next, a patterned channel layer and a hard-mask layer are formed on the gate insulating layer, wherein the patterned channel layer and the hard-mask layer are located above the gate electrode, and the hard-mask layer is disposed on the patterned channel layer. Afterwards, a source and a drain are formed on the gate insulating layer by a wet etchant. The part of the hard-mask layer that is not covered by the source and the drain is removed by the wet etchant until the patterned channel layer is exposed, so as to form a plurality of patterned hard-mask layers.