BCH Decoder Chien Search Using Precomputed Initial Elements
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Solution Overview
Problem
BCH decoders face latency issues and high complexity due to the time-consuming process of finding roots of the error locator polynomial, particularly when the number of data bits is less than a preset value, and the area-consuming parallel Chien search circuit in existing BCH decoding systems.
Innovation Solution
The method involves pre-calculating initial elements during the syndrome calculation stage, skipping the processing of unnecessary bits, and replacing multipliers in the Chien search circuit with shifters to reduce area and latency, while using modulo operations to transform values, thereby optimizing the decoding process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a parallel Chien search circuit is implemented to improve decoding throughput, then productivity is improved, but device complexity and area increase
Solution Approach 1:
The patent pre-calculates and stores powers of the primitive element in a lookup table during the syndrome calculation stage. This preliminary action eliminates the need for real-time multiplication operations in the Chien search circuit, allowing the use of simpler shift register-based implementation while maintaining high decoding throughput.
Solution Approach 2:
The patent replaces the traditional multiplier-based Chien search circuit with a shift register-based system. By substituting complex multiplication operations with simple shift and add operations, the circuit area and complexity are significantly reduced while preserving the parallel processing capability needed for high throughput.
2Adaptability or versatility
If the number of data bits is less than the preset value of GF(2^m-1), then adaptability is improved, but processing time increases due to extra latency
Solution Approach 1:
The patent implements a partial processing approach where the Chien search circuit only evaluates the error locator polynomial for the actual number of data bits present, rather than processing all 2^m-1 positions. This partial action eliminates unnecessary processing of padded bits, reducing latency while maintaining adaptability to variable data lengths.
Solution Approach 2:
The patent introduces dynamic control logic that adjusts the number of processing cycles based on the actual data bit length. The system dynamically configures the Chien search operation to match the input size, preventing fixed-processing-time latency while preserving flexibility to handle different data lengths.
3Productivity
If syndrome calculation and initial element determination are performed during the same time interval, then productivity is improved, but device complexity increases
Solution Approach 1:
The patent merges the syndrome calculation and initial element determination operations into a single unified circuit structure. By combining these two functions that share common computational resources (such as the primitive element power calculations), the system achieves parallel processing in the same time interval without proportionally increasing device complexity.
Solution Approach 2:
The patent designs a universal circuit module that can perform multiple functions: syndrome calculation, initial element determination, and error location identification. This multi-functional approach allows the same hardware resources to be reused across different processing stages, improving productivity while controlling device complexity through resource sharing.
Data Source
AI summary
The present disclosure relates to methods and systems for decoding a Bose-Chaudhuri-Hocquenghem (BCH) encoded codeword. The methods-may include receiving a codeword over a data channel; determining a plurality of syndrome values for the codeword during a first time interval; determining a set of initial elements during the first time interval; generating an error locator polynomial based on the plurality of syndrome values, the error locator polynomial representing one or more errors in the codeword; evaluating, based on the set of initial elements, the error locator polynomial to identify one or more error locations corresponding to the one or more errors in the codeword; and correcting the codeword based on the one or more error locations.