BCH ECC Inversion for MRAM Partial Short Correction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing error correction techniques for memory devices, particularly MRAMs, are inadequate in addressing biased manufacturing defects that cause partial shorts, limiting their effectiveness in correcting errors.
Innovation Solution
Implementing an error correction code scheme that includes a Bose-Chaudhuri-Hocquenghem (BCH) algorithm and hardware construction to produce invertible ECC codewords, which allows for partial short detection and correction by inverting data when necessary, using a hardware construction to produce ECC codewords that can be inverted without losing general bit protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error correction techniques are used, then error correction capability is limited to two corrections and one detection, but the manufacturing defects causing partial shorts cannot be effectively mitigated
Solution Approach 1:
The patent applies inversion by detecting partial shorts and inverting the data bit at the affected location. Instead of attempting to correct the physical defect, the system inverts the logical value to compensate for the manufacturing bias, effectively converting the harmful effect into a correctable error pattern that the ECC can handle.
Solution Approach 2:
The patent performs preliminary detection of partial shorts during the write operation before the data is permanently stored. By detecting the manufacturing defect early and inverting the affected bit proactively, the system prevents corrupted data from being written to the memory array, thereby improving overall reliability.
2Object-affected harmful factors
If more complex error correction schemes are implemented to handle manufacturing defects, then defect mitigation improves, but design complexity and time overhead increase
Solution Approach 1:
The patent merges the partial short detection function with the existing ECC write operation. By integrating the detection and inversion logic into the normal write path, the system achieves defect mitigation without adding separate complex correction mechanisms, thereby minimizing design complexity and time overhead.
Solution Approach 2:
The system performs self-diagnosis by detecting its own manufacturing defects during operation. The ECC circuit automatically identifies partial shorts and corrects them through bit inversion without requiring external intervention or complex additional hardware, enabling the system to serve its own error correction needs efficiently.
Data Source
AI summary
A method of correcting one or more errors in a memory device, the method performed by one or more controllers. The method may receive data. The method may further write bits at a memory location to a first state. The method may further read respective values of the bits at the memory location. The method may further determine an error correction based on the respective values. The method may further write the received data to the memory location as received data or inverted data, based on the error correction.


