BCH/LDPC Control Data Processing with Dummy Bit Reinsertion

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Solution Overview

Problem

In new digital broadcasting standards, T2 frames are used as units for data transmission, leading to high Peak-to-Average Power Ratio (PAPR) in OFDM signals, which can result in signal clipping and degraded quality, making it difficult to process control data in reception devices compliant with DVB-T.2 standards.

Innovation Solution

Scrambling of control data in transmission devices to improve PAPR, followed by appropriate processing in reception devices to restore the original data, including descrambling and padding operations, ensures that control data can be processed efficiently and in compliance with DVB-T.2 standards.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If control data is scrambled to improve PAPR, then PAPR is reduced and signal clipping is prevented, but reception device complexity increases due to additional descrambling operations

Engineering Contradiction:
Improvesignal qualityVSAvoidreception device processing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments control data into multiple blocks and applies different scrambling sequences to each block. This segmentation allows the reception device to process each block independently with simpler descrambling operations, reducing overall complexity while maintaining PAPR improvement benefits

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary processing stage where control data is scrambled before transmission and systematically descrambled at reception. This intermediary scrambling/descrambling mechanism acts as a mediator that transforms the signal to achieve lower PAPR while providing a structured approach that manages reception device complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If control data is scrambled to improve PAPR, then PAPR is reduced, but processing difficulty increases due to different operations required

Engineering Contradiction:
Improvesignal qualityVSAvoidcontrol data processing ease
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent changes the scrambling parameters (such as scrambling sequences or polynomials) based on block position or data characteristics. This parameter variation allows the system to maintain PAPR improvement while creating a more systematic and easier-to-process structure at the reception end, as the parameter changes follow predictable patterns

Inventive Principle:
Principle #35Parameter changes

3Productivity

If dummy data and parity bits are removed from concatenated BCH/LDPC code, then processing efficiency is improved, but error correction capability may be reduced

Engineering Contradiction:
Improveprocessing efficiencyVSAvoiderror correction capability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent extracts and removes dummy data and parity bits from the concatenated BCH/LDPC code structure in a controlled manner. This extraction process is designed to eliminate redundant elements that hinder processing efficiency while preserving the essential error correction capabilities through careful selection of what to remove and what to retain

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements a discarding and recovering mechanism where dummy data and parity bits are temporarily removed to improve processing efficiency, but the structure is designed to recover essential error correction information when needed. This allows the system to switch between high-efficiency processing mode and high-reliability error correction mode as required

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentEP3429084B1Device and method for removing dummy data and parity bits of concatenated BCH/LDPC code
Publication Date: 2021.08.25 SATURN LICENSING LLC
  • EP3429084B1 patent drawingFigure 1
  • EP3429084B1 patent drawingFigure 2
  • EP3429084B1 patent drawingFigure 3

AI summary

The present invention relates to a data processing device and a data processing method that can readily process control data having its PAPR improved. Data are first scrambled. Then the scrambled data are padded. The scrambled data and the padding bits undergo concatenated coding, the concatenated coding consisting first of Bose-Chaudhuri-Hocquenghem, BCH, encoding and then of Low Density Parity Check, LDPC, encoding. Prior to transmission and in order to limit the amount of transmitted bits, parity bits of the LDPC code are punctured and dummy data are removed from the transmitted data. At the receiver, inverse operations are performed, especially dummy data, essentially zeros, need to be re-inserted before the LDPC decoding operation is performed.