BD Cell Display Panel Mura Compensation via Pixel Offset Adjustment
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Solution Overview
Problem
Large-sized display panels often suffer from bulk mura due to equipment limitations, leading to misalignment between main and sub cells in BD cell displays, resulting in display issues like edge blur, ghosting, and increased mura, which are difficult to adjust and costly to compensate for using existing Demura technology.
Innovation Solution
A BD cell display panel with a main cell and a sub cell stacked together, featuring an X-printed circuit board assembly (X-PCBA) that stores pixel offset and mura compensation data, allowing the control plate to adjust display areas to compensate for misalignment and mura, maintaining accuracy without increasing resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If existing Demura technology is used to compensate for mura in large-sized display panels, then mura compensation can be achieved, but the cost and hardware resources required increase significantly
Solution Approach 1:
The patent segments the display panel into a main cell and a sub cell, allowing independent measurement and compensation of mura characteristics for each cell. This segmentation enables targeted compensation without requiring comprehensive system-wide hardware resources, thereby reducing overall system complexity while maintaining compensation accuracy.
Solution Approach 2:
The patent performs preliminary measurement of pixel offset and mura characteristics during the manufacturing process, storing this data in the X-PCBA plate. By conducting these measurements and storing compensation data in advance, the system eliminates the need for complex real-time measurement and processing hardware during actual display operation, thus reducing hardware requirements while maintaining high compensation accuracy.
2Area of stationary object
If the main cell and sub cell are stacked to form BD cell, then display area is increased, but pixel misalignment occurs causing edge blur and ghosting
Solution Approach 1:
The patent performs preliminary measurement of the pixel offset between main and sub cells during manufacturing, using alignment marks to quantify the misalignment. This pre-measured offset data is stored in the X-PCBA plate and used to generate compensation data that adjusts the display areas of both cells, thereby correcting the pixel misalignment issue while maintaining the stacked configuration's space efficiency.
Solution Approach 2:
The patent changes the display area parameters of the main cell and sub cell based on the measured pixel offset. By dynamically adjusting which pixels from each cell are displayed and how their display areas are configured, the system compensates for the physical misalignment between stacked cells, eliminating edge blur and ghosting while preserving the increased display area benefit.
3Measurement precision
If alignment marks are used to measure offset distance, then pixel offset can be determined, but measurement complexity increases
Solution Approach 1:
The patent uses alignment marks as simplified visual copies or representations of the actual pixel grid positions. Instead of requiring complex physical measurement systems, the alignment marks provide a straightforward visual reference that can be easily captured and measured, thereby achieving precise offset determination with minimal measurement system complexity.
Data Source
AI summary
The present disclosure discloses a BD cell display panel, a manufacturing method and a driving method thereof, and a display device. The BD cell display panel includes a main cell and a sub cell which are stacked, an XPCBA plate and a control plate. The control plate is configured to read the pixel offset amount and the mura compensation data from the XPCBA plate, and adjust at least one of the first display area and the second display area according to the pixel offset amount, thus causing pixels in the first display area and the second display area that are orthogonally projected within an actual display area of the BD cell display panel to be displayed, and compensating for the mura in the main cell and the sub cell according to the mura compensation data.