Beamforming Receiver ADC Sequencing for Mismatch Error Reduction
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Solution Overview
Problem
Digital beamforming receivers using time-interleaved analog-to-digital converters (ADCs) face significant signal errors due to mismatch errors between sub-ADCs, leading to corrupted output, as the increased sampling rate and high dynamic range requirements result in timing and offset errors.
Innovation Solution
An error correction system dynamically adjusts the sampling sequence of sub-ADCs by generating an error matrix that reconfigures the sampling operations to minimize errors, using a barrel-shifter function to pair sub-ADCs with minimal errors with those having maximum errors, ensuring that the summation of errors in each column approximates to a target value, thereby reducing overall sampling errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If time-interleaved ADCs are used to increase sampling rate, then productivity is improved, but manufacturing precision deteriorates due to mismatch errors between sub-ADCs
Solution Approach 1:
The patent measures and stores timing and offset errors for each sub-ADC in advance, before signal processing occurs. These error values are saved in a lookup table, allowing the system to pre-compensate for mismatch errors when processing signals, thereby maintaining high sampling rates while correcting precision issues
Solution Approach 2:
The system dynamically adjusts the timing and offset parameters of individual sub-ADCs based on measured error values. By changing these parameters according to stored error data, the system compensates for manufacturing mismatches and maintains signal accuracy despite using multiple parallel converters
2Measurement precision
If multiple sub-ADCs are used to achieve high dynamic range, then measurement precision is improved, but object-generated harmful factors worsen due to signal corruption from mismatch errors
Solution Approach 1:
The patent converts the harmful mismatch errors between sub-ADCs into a manageable parameter by measuring and storing these errors. The stored error values are then used to compensate for the mismatches during signal processing, transforming what was previously harmful signal corruption into a correctable condition that maintains or even improves measurement precision
3Reliability
If synchronous operation of ADCs is maintained to ensure reliability, then reliability is improved, but productivity deteriorates due to minimal timing error constraints
Solution Approach 1:
The system performs preliminary measurement and storage of timing errors for each sub-ADC. This advance preparation allows the system to subsequently operate sub-ADCs with larger timing differences while still achieving accurate results through error compensation, thereby increasing the achievable sampling rate without sacrificing reliability
Solution Approach 2:
The patent transitions from a static synchronous operation model to a dynamic error-compensation model. By measuring and storing timing errors and using these values to adjust processing, the system can dynamically accommodate timing variations between sub-ADCs, enabling higher sampling rates while maintaining output reliability
Data Source
AI summary
An apparatus, such as a radar system that conducts beamforming operations, includes a plurality of analog-to-digital-converters (ADCs) and an error correction system coupled to the ADCs. Based upon an assessment of a plurality of errors associated with the ADCs by the error correction system, the error correction system programs sampling operations for the ADCs. The error correction system includes an error correction unit that identifies the plurality of errors associated with a plurality of sub-ADCs of the ADCs, a selection unit coupled to the error correction unit that sorts the errors associated with the plurality of sub-ADCs, and a programming unit coupled to the selection unit that reconfigures the sorted errors to generate a sequence of sampling operations for the plurality of sub-ADCs. Using, for example, a barrel shifter function, the sorted errors are reconfigured by the programming unit such that a summation of elements in each column in a matrix in which the sorted errors are stored are within a predefined value.