BEMF Monitor PGA Calibration for Monotonic Gain Scaling
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Solution Overview
Problem
Existing hard disk drive (HDD) servo ICs face challenges in achieving linear programmable gain calibration for BEMF monitoring due to non-linear transfer functions, switch on-state resistances contributing to gain errors, and trade-offs between 'shunt effect' and 'leakage effect' which degrade resolution and linearity, especially in high-volume production where circuit complexity and silicon area are concerns.
Innovation Solution
A programmable gain amplifier (PGA) design featuring a coarse ladder with individually addressable resistors and a fine ladder with adaptive control and PMOS compensation for back gate leakage, ensuring consistent current direction and monotonic gain scaling by adjusting the fine ladder resistance based on shunted coarse ladder resistors and using PMOS devices to compensate for NMOS leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If switches are used in the feedback path for programmable gain, then gain programmability is achieved, but switch on-state resistances contribute to gain errors and non-linearity
Solution Approach 1:
The patent introduces an operational amplifier as an intermediary component between the switches and the signal path. The op-amp's high input impedance isolates the switch on-state resistance from affecting the gain accuracy, while still allowing digital control of the gain through the switches connected to the op-amp's input node.
Solution Approach 2:
The patent applies different impedance characteristics to different parts of the circuit: high input impedance at the op-amp input node to minimize the effect of switch resistance, and controlled feedback impedance through the op-amp to maintain gain accuracy. This local differentiation of impedance properties resolves the contradiction between switch-based programmability and gain precision.
2Measurement precision
If a single-ladder architecture is used for 13-bit programmable gain, then full resolution is achieved, but circuit complexity and silicon area increase significantly
Solution Approach 1:
The patent divides the 13-bit programmable gain amplifier into multiple segments or stages, each handling a portion of the total gain range. This segmentation reduces the complexity of individual ladder networks while maintaining the overall 13-bit resolution through cascaded stages, each with fewer switches and resistors than a single full-resolution stage would require.
Solution Approach 2:
The patent implements a nested architecture where coarser gain stages are embedded within finer gain stages, or vice versa. This nesting allows the circuit to achieve 13-bit resolution by combining multiple smaller-resolution stages, reducing the total number of switches and resistors compared to a single monolithic 13-bit ladder network.
3Manufacturing precision
If fine ladder resistance is increased to minimize shunt effect, then DNL/INL performance improves, but leakage current becomes dominant and degrades performance
Solution Approach 1:
The patent dynamically adjusts the fine ladder resistance value based on the operating conditions and digital control code. By changing the resistance parameter adaptively, the circuit maintains optimal performance across different gain settings, preventing leakage current from becoming dominant while still minimizing the shunt effect when needed.
Solution Approach 2:
The patent implements dynamic control of the fine ladder resistance through digital switching networks that reconfigure the resistance value based on the desired gain setting. This dynamic adjustment allows the circuit to optimize the balance between shunt effect minimization and leakage current suppression for each operating point, rather than being fixed at a single resistance value.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves 13-bit resolution and accuracy with linear gain scaling, minimizing errors from 'shunt' and 'leakage' effects, reducing circuit complexity, and maintaining consistent current flow, thus enhancing HDD servo IC performance and reducing silicon area consumption.
Implementation Method 1
using PMOS devices to compensate for NMOS leakage
Implementation Method 2
a coarse ladder having a plurality of resistors, wherein each of the plurality of resistors are individually addressable; a fine ladder that is coupled to the coarse ladder
Data Source
AI summary
A high performance digitalized Programmable Gain Amplifier (PGA). In prior art circuit, a dual-ladder DAC is employed for gain control, the back gate leakage of NMOS resistors in the fine ladder conquers fine ladder nominal current and it produces non-monotonic gain scallop. Two new art design techniques: (1) adaptively control the fine ladder; and (2) use dummy PMOS brunch device leakage compensates for the NMOS resistor device leakage, are proposed so that the non-monotonic scallops are substantially eliminated and 13-bit resolution/accuracy PGA has been achieved.