Display Panel Multiplexer Placement Across the Bending Area
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Solution Overview
Problem
The complexity of circuit layout in OLED display screens, particularly in the Pad area, is exacerbated by the need for increased signal lines due to higher pixel resolution, leading to complex IC bonding and difficulty in processes like COP or COF, and potential wiring conflicts between multiplexers and GOA circuits.
Innovation Solution
A display panel design with multiplexers positioned below the bending area, reducing wiring conflicts and IC pin count, and incorporating a staggered arrangement of multiplexers to minimize impedance and stabilize signals, while allowing for a narrower lower frame and reduced risk of bending cracks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If more signal lines are arranged to control increased pixels for higher resolution, then display resolution is improved, but IC pin count increases and bonding complexity increases
Solution Approach 1:
Multiple signal lines are merged through the multiplexer circuit, which consolidates multiple data lines into fewer output lines that connect to the IC, reducing the total number of pins required while maintaining the ability to drive all pixels
Solution Approach 2:
The multiplexer circuit serves multiple functions: it reduces IC pin count, simplifies bonding processes, and maintains full pixel driving capability, making the system more versatile without sacrificing resolution
2Device complexity
If multiplexers are provided in the display panel to reduce IC pin count, then IC pin count is reduced and process difficulty is lessened, but wiring conflict between multiplexers and GOA circuits occurs
Solution Approach 1:
The multiplexer is repositioned from the traditional location near the display area to a location in the lower frame area, changing its spatial dimension and eliminating overlap with GOA circuit wiring paths, thus resolving the wiring conflict
Solution Approach 2:
The multiplexer is extracted from the crowded Pad area and relocated to the lower frame area, separating it from the GOA circuit routing zone and eliminating the wiring conflict while preserving its pin-reduction function
3Area of stationary object
If lower frame is narrowed for full-screen realization, then display area is increased, but circuit layout space in Pad area is reduced
Solution Approach 1:
Circuit components (multiplexer) are relocated from the horizontal Pad area to the vertical lower frame area, utilizing unused space in a different dimension, thereby narrowing the lower frame while maintaining circuit functionality
Solution Approach 2:
The display device is segmented into distinct functional areas: the display area for pixels and the lower frame area for circuit components, allowing independent optimization of each zone and enabling narrower bezels
Data Source
AI summary
The present disclosure provides a display panel and a display device. The display panel includes a display area and a peripheral area. The display area includes a plurality of sub-pixels on a substrate. The peripheral area including: a bending area; a plurality of multiplexers on a side of the bending area away from the display area and on the substrate, and each multiplexer is at least connected with a signal input line and two signal output lines; and a bonding area on a side of the plurality of multiplexers away from the bending area. The plurality of multiplexers are electrically connected to the plurality of sub-pixels through the bending area. The signal input line is electrically connected to the bonding area. An orthographic projection of the signal input line on the substrate does not overlap with an orthographic projection of the bending area on the substrate.