Bending Beam Closed-Loop Control With Higher Bit Depth

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Solution Overview

Problem

Scanning probe microscopes face challenges in maintaining precise control over bending beams during mode transitions due to the limitations of digital signal processing, particularly when switching between operating modes, which can lead to damage or destruction of samples and probes.

Innovation Solution

A device and method utilizing a programmable logic circuit with increased bit depth for processing control errors, allowing for precise control of bending beams by ensuring the programmable logic circuit can handle the full range of control error values and parameters without overflow, and implementing data reduction only after calculation to maintain precision and prevent unintended contact with the sample.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If digital signal processing is used to control bending beams during mode transitions, then automation and control precision are improved, but transient disruptions and loss of control occur due to limited bit depth

Engineering Contradiction:
Improveautomation of bending beam controlVSAvoidcontrol stability during mode transitions
Core Design Contradiction:
Extent of automationVSReliability

Solution Approach 1:

The patent applies parameter changes by increasing the bit depth of the programmable logic circuit from standard 16-bit to 32-bit or higher. This parameter change allows the circuit to handle the full range of control error values without overflow, eliminating transient disruptions during mode transitions while maintaining automation. The higher bit depth provides sufficient precision to represent control errors and manipulated variables accurately throughout the transition process.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If standard bit depth processing is used for control errors, then device complexity is reduced, but precision and control accuracy deteriorate during mode transitions

Engineering Contradiction:
Improvecomplexity of control circuitVSAvoidcontrol precision during mode transitions
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent implements parameter changes by transitioning from standard 16-bit processing to 32-bit or higher bit depth processing in the programmable logic circuit. This change in parameter (bit depth) significantly improves control precision during mode transitions, allowing accurate representation of control errors and manipulated variables without requiring a complete redesign of the control architecture.

Inventive Principle:
Principle #35Parameter changes

3Speed

If data reduction is performed early in the processing chain, then processing speed is improved, but precision is lost and unintended contact with sample occurs

Engineering Contradiction:
Improveprocessing speedVSAvoidprecision of control error values
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by performing data reduction only after all calculations and control operations are completed. The full-range 32-bit or higher precision values are maintained throughout the control error processing, calculation of manipulated variables, and mode transition operations. Data reduction to the original bit depth is performed only in the final output stage, ensuring that precision is preserved throughout the entire control process and preventing unintended contact with the sample.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12405289B2Device and method for operating a bending beam in a closed control loop
Publication Date: 2025.09.02 CARL ZEISS SMT GMBH
  • US12405289B2 patent drawing
  • US12405289B2 patent drawing
  • US12405289B2 patent drawing

AI summary

The present invention relates to a device for operating at least one bending beam in at least one closed control loop, wherein the device has: (a) at least one first interface designed to receive at least one controlled variable of the at least one control loop; (b) at least one programmable logic circuit designed to process a control error of the at least one control loop using a bit depth greater than the bit depth of the controlled variable; and (c) at least one second interface designed to provide a manipulated variable of the at least one control loop.