Bent Active Fin Layout for Precise FinFET Gate Formation
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Solution Overview
Problem
Semiconductor devices with fin-FETs face challenges in transistor performance due to edge portion failures and difficulty in forming gate structures across active fins with narrow spaces, leading to increased distances between gate structures and active fins, which can result in transistor failures.
Innovation Solution
The semiconductor device design includes active fins with straight line extension portions and bent portions, allowing for a wavy shape that increases the distance between gate structures and active fins, reducing transistor failures by facilitating easier formation of gate structures across these fins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If active fins are placed close together to increase integration density, then productivity is improved, but manufacturing precision deteriorates due to difficulty in forming gate structures across narrow spaces
Solution Approach 1:
The active fin is designed with a bent portion instead of a straight configuration. This curvature allows the gate structure to be formed more easily across the active fin while maintaining narrow spacing between adjacent fins, thus resolving the contradiction between high integration density and manufacturing precision
2Productivity
If gate structures are formed across active fins with narrow spacing, then productivity is improved, but reliability deteriorates due to edge portion failures
Solution Approach 1:
The bent portion of the active fin modifies the geometry at the edge regions, reducing stress concentration and preventing edge portion failures during gate structure formation. This maintains transistor reliability while allowing high integration density
3Reliability
If distance between gate structures and active fins is increased to prevent transistor failures, then reliability is improved, but device complexity increases
Solution Approach 1:
Instead of increasing the physical distance between gate structures and active fins, the invention uses a bent portion configuration that maintains electrical reliability while preserving the compact layout, thus avoiding increased device complexity
Data Source
AI summary
A semiconductor device may include a first active fin, a second active fin and a gate structure. The first active fin may extend in a first direction on a substrate and may include a first straight line extension portion, a second straight line extension portion, and a bent portion between the first and second straight line extension portions. The second active fin may extend in the first direction on the substrate. The gate structure may extend in a second direction perpendicular to the first direction on the substrate. The gate structure may cross one of the first and second straight line extension portions of the first active fin and may cross the second active fin.