Bent-Back Leadframe Structure for Higher Current Wire Bonding
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Solution Overview
Problem
Wide bandgap devices like SiC and GaN transistors achieve higher current density, leading to limitations in interconnects due to reduced bondable area, and integration of passives or additional devices causes thermal decoupling and heating issues, necessitating an increase in bonding area and current throughput.
Innovation Solution
A semiconductor device with a leadframe featuring a bent back lead or an additional electrical member connected to the leads, allowing for expanded wire bonding area and integration of additional devices, either by bending the leadframe surface or attaching a large ribbon for increased current capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If wide bandgap devices are used to achieve higher current density, then current output is improved, but interconnect bonding area becomes insufficient
Solution Approach 1:
The leadframe structure is extended by adding an extended leadframe surface that projects from the original leadframe plane, creating a second layer bonding area. This dimensional extension provides additional bonding area without increasing the footprint of the original leadframe, thereby resolving the contradiction between higher current output requirements and limited bonding area.
Solution Approach 2:
The bonding area is segmented into two distinct layers: a first layer on the original leadframe surface and a second layer on the extended leadframe surface. This segmentation allows wire bonds to be distributed across multiple levels, effectively increasing the total bonding area available for high current density applications without requiring a single large bonding surface.
2Adaptability or versatility
If additional devices are integrated into the lead area, then device functionality is improved, but bonding area is reduced
Solution Approach 1:
By projecting the extended leadframe surface from the original leadframe plane, the patent creates additional bonding area in a different spatial dimension. This allows passives or other devices to be integrated on the original leadframe while the extended surface provides sufficient bonding area for high current density connections, resolving the conflict between device integration and bonding area availability.
3Adaptability or versatility
If additional devices are placed on the die pad, then device functionality is improved, but thermal decoupling causes heating issues
Solution Approach 1:
The extended leadframe surface provides a separate bonding layer that is electrically and thermally connected to the die pad through the leadframe structure. This allows additional devices to be placed on the die pad while high current connections are established on the extended surface, maintaining thermal coupling through the leadframe while providing integration capability.
4Power
If clips or wedge-on-wedge technology are used to increase current density, then current throughput is improved, but reliability issues arise
Solution Approach 1:
The patent uses wire bonding technology on an extended leadframe surface to achieve high current throughput without the reliability issues associated with clips or wedge-on-wedge technology. The extended surface allows for proper wire bond geometry and bonding area while maintaining the reliability advantages of proven wire bonding processes.
Data Source
Figure 1~2
Figure 3A~4
AI summary
A semiconductor device (10; 20) comprises a leadframe (11; 21) comprising a die pad (11A; 21A) and a plurality of leads (11B; 21B), a semiconductor die (12; 22) disposed on the die pad (11A; 21A), the semiconductor die (12; 22) comprising a contact pad (12A; 22A) on a first main face thereof, and one or more bond wires (13; 23) connected with the contact pad (12A; 22A), wherein a lead (11B.1; 21B.1) of the plurality of leads (11B; 21B) is bent back and connected with at least one first bond wire (13A; 23) of the one or more bond wires (13; 23).