Bent Channel Oxide Transistor for Grayscale Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current display apparatuses, particularly light-emitting diode (LED) displays, face challenges in achieving high-quality image display with efficient power consumption and long channel length on narrow planes, which affects grayscale control and display quality.

Innovation Solution

The display apparatus incorporates a silicon-based semiconductor layer with a bent channel region and oxide-based semiconductor layers, featuring integral channel, source, and drain regions with high hydrogen concentration, along with specific contact hole structures and insulating layers to enhance transistor performance and reduce power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a long channel length is used in the transistor, then grayscale control and display quality are improved, but the device occupies more area and power consumption increases

Engineering Contradiction:
Improvegrayscale controlVSAvoiddevice area
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The patent applies a bent channel configuration in the semiconductor layer, where the channel follows a curved path between source and drain regions. This curvature allows the channel length to be extended without increasing the linear footprint of the device, thereby improving grayscale control while maintaining a compact area. The bent channel is formed by patterning the semiconductor layer to follow a curved trajectory, effectively utilizing spatial arrangement to resolve the contradiction between channel length and device area.

Inventive Principle:
Principle #14Spheroidality (Curvature)

2Manufacturing precision

If a long channel length is used in the transistor, then grayscale control is improved, but power consumption increases

Engineering Contradiction:
Improvegrayscale controlVSAvoidpower consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by stationary object

Solution Approach 1:

The patent employs oxide-based semiconductor materials with specifically controlled hydrogen concentrations (1.1×10²¹ atom/cm³ or greater) in the source and drain regions. This parameter control enables the transistor to achieve low leakage current and high carrier mobility, allowing for improved grayscale control through enhanced threshold voltage stability without proportionally increasing power consumption. The hydrogen concentration parameter is critical in optimizing the balance between performance and energy efficiency.

Inventive Principle:
Principle #35Parameter changes

3Area of stationary object

If contact holes are positioned close to the channel region, then device area is reduced, but carrier mobility decreases and staining occurs

Engineering Contradiction:
Improvedevice areaVSAvoidcarrier mobility
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent implements spatial differentiation in the device structure by positioning contact holes at specific distances from the channel region (first distance ≥2μm for oxide transistor contact holes, second distance ≥2.4μm for insulating layer contact holes). This local quality approach ensures that regions requiring high carrier mobility (near the channel) are kept free from contact hole disruptions, while other areas can accommodate contact holes for electrical connections. The hydrogen concentration control in source/drain regions further enhances local quality by maintaining high carrier density where needed.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11502111B2Display apparatus
Publication Date: 2022.11.15 SAMSUNG DISPLAY CO LTD
  • US11502111B2 patent drawing
  • US11502111B2 patent drawing
  • US11502111B2 patent drawing

AI summary

A display apparatus includes a first silicon transistor including a first semiconductor layer including a silicon-based semiconductor and a first gate electrode; a first oxide transistor including a second semiconductor layer and a second gate electrode, the second semiconductor layer including an oxide-based semiconductor; an upper insulating layer on the first and second semiconductor layers; and a first connection electrode on the upper insulating layer, electrically connected to the first semiconductor layer through a first contact hole of the upper insulating layer, and electrically connected to the second semiconductor layer through a second contact hole of the upper insulating layer. The second semiconductor layer includes a channel region, a source region, and a drain region, and a first distance between the channel region of the second semiconductor layer and the first contact hole is about 2 μm or greater.