Bent Source Drain Transistor Structure for Snapback Mitigation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The reduction in transistor size for increased integration leads to damage due to the snapback phenomenon, where high current caused by instantaneous bipolar action between the source and drain can melt metal contacts, and maintaining high voltage breakdown characteristics is challenging with increased doping concentration.

Innovation Solution

A semiconductor device with a modified structure featuring bent source and drain transistors and optimized doping concentrations, along with increased distance between the gate and contact, to reduce snapback occurrence and enhance electrical characteristics while maintaining high voltage capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the size of transistors is reduced to increase degree of integration, then the degree of integration is improved, but the transistors may be damaged due to snapback phenomenon

Engineering Contradiction:
Improvedegree of integrationVSAvoidtransistor damage resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The source and drain regions are configured with bent forms instead of straight lines. Specifically, the first source and first drain are bent in one direction while the second source and second drain are bent in the opposite direction. This curved geometry increases the distance between gate and contact regions, reducing the snapback effect that causes transistor damage, while allowing compact transistor layout for high integration.

Inventive Principle:
Principle #14Spheroidality (Curvature)

2Strength

If doping concentration is increased to maintain high voltage breakdown characteristics, then the breakdown voltage is improved, but the snapback phenomenon is exacerbated

Engineering Contradiction:
Improvebreakdown voltageVSAvoidsnapback phenomenon
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

The bent configuration of source and drain regions increases the effective distance between the gate electrode and the contact regions. This geometric modification reduces the electric field concentration that causes snapback, allowing the device to maintain high voltage breakdown characteristics without requiring excessive doping concentration that would trigger snapback.

Inventive Principle:
Principle #14Spheroidality (Curvature)

3Reliability

If the distance between gate and contact is increased to reduce snapback, then the snapback resistance is improved, but the transistor area increases

Engineering Contradiction:
Improvesnapback resistanceVSAvoidtransistor area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

By bending the source and drain regions in opposite directions, the patent achieves increased effective distance between gate and contact regions along the current path, while the overall footprint area remains compact. The curved geometry allows the current to travel a longer path through the bent source/drain regions without increasing the lateral dimensions of the transistor.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The bent source and drain regions are configured to interleave or nest within the available space between adjacent transistor structures. The first source/drain bent in one direction and the second source/drain bent in the opposite direction allow efficient space utilization, achieving increased gate-to-contact distance while maintaining compact transistor area through nested spatial arrangement.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The modified structure effectively minimizes transistor area while preventing snapback damage, improving electrical characteristics and maintaining high voltage breakdown voltage, thus enhancing the degree of integration and reliability.

Implementation Method 1

Damage of the transistor may be caused due to a snapback phenomenon in a channel-off state. When a voltage is applied to the drain D, a drain potential is increased and electric hole pairs are formed in the gate G, increasing an amount of holes transferred to a substrate SUB. Accordingly, a bipolar action is made due to an instantaneous turn-on phenomenon between the source S and the drain D, rapidly increasing a current.

Methodology Applied
Scientific EffectSnapback phenomenon:

Implementation Method 2

The current increased by such a snapback phenomenon is a high current enough to melt a contact C, resulting in the contact D and the plug DP made of a metal to be burnt through joule heating.

Methodology Applied
Scientific EffectJoule heating: Joule Heating

Data Source

PatentUS9018707B2Semiconductor device
Publication Date: 2015.04.28 MIMIRIP LLC
  • US9018707B2 patent drawing
  • US9018707B2 patent drawing
  • US9018707B2 patent drawing

AI summary

A semiconductor device includes a first transistor group including first transistors, wherein each of the first transistors includes a first gate, and a first source and a first drain disposed symmetrically at both sides of the first gate and having a bent form; and a second transistor group including second transistors, wherein each of the second transistors includes a second gate, and a second source and a second drain disposed symmetrically at both sides of the second gate and having a bent form, wherein the first source and the first drain are bent in a direction opposite to a direction in which the second source and the second drain are bent.