Bent Substrate Electronic Device Border Width Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge is to reduce the width of the border in electronic devices to achieve a narrow border design or borderless design, as existing technologies are limited in minimizing the peripheral circuitry space.

Innovation Solution

The electronic device incorporates a substrate with a bent design, featuring a main and auxiliary electronic unit, and corresponding working circuits on different active regions, with auxiliary working circuits on a second portion that allows for reduced border width and increased screen proportion, utilizing anti-crack patterns in connection lines to enhance durability and signal consistency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If circuits or chips are disposed in the peripheral region, then the electronic device can function properly, but the border width cannot be reduced further

Engineering Contradiction:
Improveborder widthVSAvoidcircuit arrangement complexity
Core Design Contradiction:
Length of stationary objectVSDevice complexity

Solution Approach 1:

The patent applies dimensionality change by folding the peripheral region onto itself, transforming a two-dimensional circuit layout problem into a three-dimensional spatial arrangement. The peripheral region is folded along a first bending line and a second bending line, allowing circuits and chips to be disposed in folded layers above or below the display surface, thereby reducing the visible border width while maintaining proper circuit functionality and connectivity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If the border width is reduced to achieve narrow border design, then the screen proportion increases, but the space for disposing circuits and chips becomes insufficient

Engineering Contradiction:
Improvescreen areaVSAvoidcircuit disposal space
Core Design Contradiction:
Area of stationary objectVSArea of moving object

Solution Approach 1:

The patent implements nesting by placing circuits and chips in folded peripheral regions that are layered above or below the display surface. The peripheral region contains nested folded structures where circuits and chips are disposed in multiple layers, similar to nested dolls. This allows the display area to be maximized while the circuits and chips are accommodated in the nested folded spaces, effectively resolving the space conflict between screen area and circuit disposal space.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Shape

If the peripheral region is folded to reduce border width, then the aesthetic appearance improves, but the connection lines may be damaged or signal transmission may be inconsistent

Engineering Contradiction:
Improvedevice shapeVSAvoidsignal transmission reliability
Core Design Contradiction:
ShapeVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-designing anti-crack patterns in the connection lines before the folding process. The connection lines are configured with specific geometric patterns (such as meander or zigzag patterns) that can accommodate the folding stress without breaking. This preliminary design ensures that when the peripheral region is folded to reduce border width and improve aesthetic appearance, the connection lines maintain their integrity and signal transmission reliability is preserved.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240397750A1Electronic device
Publication Date: 2024.11.28 INNOLUX CORP
  • US20240397750A1 patent drawing
  • US20240397750A1 patent drawing
  • US20240397750A1 patent drawing

AI summary

This disclosure provides an electronic device including a substrate, a main electronic unit, an auxiliary electronic unit, a main working circuit and an auxiliary working circuit. The substrate has a first portion and a second portion bent with respect to the first portion, and the first portion includes a normal active region and a functional active region. The main electronic unit is disposed on the normal active region. The auxiliary electronic unit is disposed on the functional active region. The main working circuit is disposed on the first portion, and the main working circuit outputs a first driving signal to the main electronic unit according to a first data signal. The auxiliary working circuit is disposed on the second portion, and the auxiliary working circuit outputs a second driving signal to the auxiliary electronic unit according to a second data signal.