BEOL Interconnect Air Gap Layout Without Via Exclusion Zones
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Solution Overview
Problem
As semiconductor and memory devices scale down, the RC product of back-end-of-line (BEOL) interconnects increases due to rising resistance and constant or linearly increasing capacitance, necessitating reduced capacitance through lower dielectric constants, but air gaps are inefficiently utilized due to exclusion zones around via structures, leading to electrical shorts and reduced air gap effectiveness.
Innovation Solution
The formation of air gap structures between metal lines in interconnects, using a non-conformal material stack with an air gap forming dielectric and a hard mask dielectric layer, and the use of sacrificial filler materials to prevent via landing shorts, allowing for maximized air gap utilization and self-aligned via landing without restrictive design rules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If air gaps are formed between adjacent metal lines to reduce capacitance and RC product, then interconnect performance is improved, but via structures cannot be directly aligned over air gaps without causing electrical shorts, requiring exclusion zones that reduce air gap utilization efficiency
Solution Approach 1:
A sacrificial filler material is deposited into the air gap before forming via structures. This preliminary action allows via structures to be formed continuously over the entire substrate surface including above air gaps, eliminating the need for exclusion zones. The sacrificial material is later removed to restore the air gap's electrical isolation function while maintaining via alignment flexibility
Solution Approach 2:
The sacrificial filler material acts as an intermediary substance that temporarily occupies the air gap space during via formation processes. It enables the via structure formation to proceed without interruption over air gap regions, and its subsequent removal restores the original air gap functionality for electrical isolation
2Reliability
If exclusion zones are created around via structures to prevent electrical shorts over air gaps, then electrical short prevention is achieved, but air gap utilization is reduced and more dielectric material is required
Solution Approach 1:
The sacrificial filler material is deposited in advance into air gap regions before via structure formation. This allows via structures to be formed continuously across the entire substrate without creating exclusion zones, thereby eliminating the need for additional dielectric material to fill the spaces that would otherwise be air gaps
Solution Approach 2:
The physical state and composition of the air gap region is temporarily changed by introducing sacrificial filler material. This parameter change enables via structures to be formed over these regions without electrical shorts, and the subsequent removal of the sacrificial material restores the low-dielectric-constant air gap condition
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables fully aligned via structures that avoid air gaps, maximizing air gap utilization and preventing electrical shorts, thereby reducing the RC product effectively while maintaining efficient interconnect performance.
Implementation Method 1
depositing a non-conformal material stack atop the plurality of metal lines, the material stack includes an air gap forming dielectric and a hard mask dielectric layer
Implementation Method 2
The sacrificial filler material is removed
Data Source
AI summary
An electrical device includes a plurality of metal lines in a region of a substrate positioned in an array of metal lines all having parallel lengths, and a plurality of air gaps between the metal lines in a same level as the metal lines, wherein an air gap is present between each set of adjacent metal lines. A plurality of interconnects may be present in electrical communication with said plurality of metal lines, wherein an exclusion zone for said plurality of interconnects is not present in said array of metal lines.