BEOL Airgap Formation via Sidewall Image Transfer
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Solution Overview
Problem
The challenge in integrated circuit fabrication is forming airgaps between tightly pitched metal lines in BEOL interconnect structures, which requires advanced patterning techniques to reduce capacitance and maintain structural stability, especially at the 7 nm technology node where metal pitch is 40 nm or less.
Innovation Solution
The solution involves a self-aligned double patterning (SADP) method using sidewall image transfer, where oxide spacers are deposited on a BEOL stack with an ultralow k dielectric layer and a hardmask, forming openings that are filled with a non-conformal ultralow k dielectric, pinching at the bottom and top to create airgaps between metal conductor lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If airgaps are formed between metal lines to reduce capacitance, then electrical performance is improved, but manufacturing complexity increases due to advanced patterning requirements
Solution Approach 1:
The patent segments the dielectric material into two distinct regions: conformal dielectric material that provides structural support and non-conformal dielectric material that creates airgaps. This segmentation allows the airgap formation process to be integrated into the existing deposition sequence, reducing manufacturing complexity while achieving the desired electrical performance improvement through capacitance reduction.
Solution Approach 2:
The patent applies preliminary action by forming the conformal dielectric layer first to establish the structural framework, then subsequently adding the non-conformal dielectric material that will be selectively removed to create airgaps. This preliminary structuring simplifies the overall process by preparing the substrate in advance for the airgap formation step.
2Productivity
If metal pitch is reduced to 40 nm or less to increase device density, then productivity is improved, but manufacturing precision requirements become more stringent
Solution Approach 1:
The patent introduces an intermediary approach by using a two-component dielectric system where the conformal dielectric provides a stable foundation and the non-conformal dielectric creates the airgap structure. This intermediary structure enables tighter metal pitch (40 nm or less) to be achieved while maintaining manufacturing precision, as the airgaps reduce capacitance effects that would otherwise complicate patterning at such small dimensions.
Solution Approach 2:
The patent effectively creates a porous dielectric structure through the airgaps formed between metal lines. This porous configuration allows for reduced effective dielectric constant, which improves signal integrity and reduces interference at the tight 40 nm pitch, thereby enabling higher device density without sacrificing manufacturing precision.
3Loss of energy
If airgaps are formed to reduce capacitance between metal lines, then energy loss is reduced, but structural stability may be compromised
Solution Approach 1:
The patent applies local quality by creating airgaps only in specific locations between metal lines where capacitance reduction is most beneficial, while maintaining conformal dielectric coverage in other areas to provide structural support. This localized airgap formation optimizes energy loss reduction without compromising overall structural stability of the interconnect system.
Solution Approach 2:
The patent creates a composite dielectric structure combining conformal dielectric material and non-conformal dielectric material with different properties. The conformal portion provides mechanical strength and structural stability, while the non-conformal portion creates airgaps to reduce capacitance and energy loss. This composite approach balances both structural integrity and electrical performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces capacitance between metal lines by forming airgaps, enabling tighter pitch and improved structural stability in BEOL interconnects, facilitating the production of advanced semiconductor devices.
Implementation Method 1
non-conformal ultralow k dielectric is deposited into the openings, wherein the ultralow k dielectric pinches at a bottom and top of the opening to form a dielectric including an airgap therein
Data Source
AI summary
A method and structure of forming air gaps with a sidewall image transfer process such as self-aligned double patterning to reduce capacitances. Different materials can be provided in the mandrel and non-mandrel regions to enlarge a process window for metal line end formation.