Direct BEOL-Bonded Semiconductor Package Without Interposers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing integration density of semiconductor components poses challenges in connecting integrated circuit dies effectively through interposers alone, leading to difficulties in communication and packaging efficiency.
Innovation Solution
The implementation of direct BEOL-BEOL bonding between integrated circuit dies, along with a substrate that eliminates the need for interposers, redistribution layers, and bumping processes, allowing for heterogeneous integration and shorter communication distances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If interposers are used to connect integrated circuit dies, then communication between dies is enabled, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent removes the interposer component from the packaging structure entirely. Instead of using an interposer to facilitate communication between dies, the invention directly bonds dies together through their respective bonding pads, eliminating the intermediate component and simplifying the overall device architecture.
Solution Approach 2:
The invention merges the functions of multiple separate components (interposer, bonding pads, connection structures) into a direct die-to-die bonding interface. By combining these elements, the patent achieves electrical connection and mechanical support without requiring the complex multi-layer interposer structure.
2Reliability
If interposer layers are used for die connection, then electrical connection is achieved, but manufacturing cost and process complexity increase
Solution Approach 1:
The patent extracts and removes the interposer layer from the manufacturing process. By eliminating this intermediate layer, the invention reduces the number of fabrication steps, materials required, and associated costs while maintaining electrical connectivity through direct die bonding.
Solution Approach 2:
The invention changes the bonding parameters by enabling direct die-to-die bonding at reduced temperatures and with simplified alignment requirements compared to traditional interposer-based processes. This parameter optimization makes the manufacturing process more economical and easier to implement.
3Reliability
If traditional packaging with interposers is used, then die connection is achieved, but thermal management becomes more difficult
Solution Approach 1:
By removing the interposer layer, the patent eliminates a thermal barrier that would otherwise impede heat flow from the dies. The direct bonding interface provides better thermal coupling, allowing heat to dissipate more efficiently from the die junctions to the package substrate.
Solution Approach 2:
The invention employs composite bonding structures that incorporate materials with high thermal conductivity at the die interface. This composite approach enhances heat transfer pathways while maintaining electrical connection, improving overall thermal management performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs, enhances performance, and facilitates easier thermal management by eliminating interposer layers and allowing air circulation around the dies, thereby improving heat dissipation and mechanical strength.
Implementation Method 1
facilitates easier thermal management by eliminating interposer layers and allowing air circulation around the dies, thereby improving heat dissipation
Data Source
AI summary
Embodiments of the present disclosure provide a semiconductor package. In one embodiment, the semiconductor package includes a first integrated circuit die having a first circuit design, and the first integrated circuit die comprises a first device layer and a first interconnect structure. The semiconductor package also includes a second integrated circuit die having a second circuit design different than the first circuit design, and the second integrated circuit die comprises a second device layer and a second interconnect structure having a first side in contact with the first device layer and a second side in direct contact with the first interconnect structure of the first integrated circuit die. The semiconductor package further includes a substrate having a first side bonded to the first interconnect structure, wherein the second integrated circuit die is surrounded by at least a portion of the substrate.