BEOL Header Circuit Layout for IC Leakage Power Gating

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Solution Overview

Problem

As semiconductor integrated circuits (ICs) become smaller and more complex, reduced operating voltages and increased power consumption due to leakage currents pose challenges, particularly in analog and digital devices, necessitating improved power management techniques.

Innovation Solution

The integration of a header circuit with a switch positioned between metal layers, featuring a gate portion that extends in two directions, enhances electron mobility and driving current capability, allowing for efficient power gating by providing different supply voltages to gated and ungated power circuits based on control signals, thereby reducing leakage current and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If operating voltage is reduced to manage power consumption, then power consumption decreases, but leakage current increases

Engineering Contradiction:
Improvepower consumptionVSAvoidleakage current
Core Design Contradiction:
Loss of energyVSObject-generated harmful factors

Solution Approach 1:

The circuit is divided into active and gated regions, with power supply segmented into different voltage domains. The header circuit segments the power distribution network to provide different voltages to different circuit blocks, enabling selective power gating to reduce leakage current in inactive regions while maintaining lower operating voltages in active regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The header circuit acts as an intermediary between the power supply and gated circuits, providing controlled power delivery. The switch within the header circuit serves as a mediator to selectively connect or disconnect power supply to gated circuits, enabling precise control over leakage current while maintaining reduced operating voltages.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Area of stationary object

If header circuit density is increased to improve integration, then area utilization improves, but manufacturing complexity increases

Engineering Contradiction:
Improveheader densityVSAvoidmanufacturing complexity
Core Design Contradiction:
Area of stationary objectVSEase of manufacture

Solution Approach 1:

The gate portion of the switch extends in two directions (first and second directions), utilizing multiple dimensions for device placement. This two-dimensional gate extension increases header density by efficiently using available area while maintaining standard manufacturing processes, avoiding the need for complex three-dimensional structures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The header circuit integrates multiple functions including power switching, voltage regulation, and signal routing into a single compact structure. The switch with its gate extending in two directions merges control functionality with power delivery, increasing density while using conventional manufacturing techniques to avoid excessive complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Object-generated harmful factors

If power gating is implemented to reduce leakage current, then leakage current decreases, but device complexity increases

Engineering Contradiction:
Improveleakage currentVSAvoidcircuit complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The header circuit performs multiple functions including power switching, voltage regulation, and circuit control through a single integrated structure. The switch with its gate extending in two directions provides both power gating capability and signal routing functionality, reducing the need for separate control circuits and thereby limiting the increase in overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250322141A1Integrated circuit and method of forming the same
Publication Date: 2025.10.16 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250322141A1 patent drawing
  • US20250322141A1 patent drawing
  • US20250322141A1 patent drawing

AI summary

An integrated circuit includes a first set of front end of line (FEOL) circuits, a first and second metal layer extending in a first direction and a second direction, a first capping layer and a back end of line (BEOL) header. The first set of FEOL circuits is configured to operate on a first supply voltage, and is located on a first layer of the integrated circuit. The second metal layer is above the first metal layer. The first capping layer is between the first and second metal layer. The BEOL header is above the first set of FEOL circuits. At least a portion of the BEOL header is positioned between the first capping layer and the second metal layer. The BEOL header is configured to be coupled to the first supply voltage, and configured to supply the first supply voltage to the first set of FEOL circuits.