BEOL Interconnects with Block Patterning Cuts

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Solution Overview

Problem

Current interconnect structures and fabrication methods for back-end-of-line (BEOL) interconnects face challenges in achieving improved pitch and spacing precision due to limitations in optical lithography and sacrificial feature dimensions.

Innovation Solution

The method involves depositing sacrificial layers and block masks to form mandrels and non-mandrel cuts, followed by selective etching and removal processes to create precise mandrel and non-mandrel spaces, which are then used to pattern the interlayer dielectric layer, allowing for the formation of BEOL interconnect structures with controlled tip-to-tip spacing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If self-aligned patterning processes with mandrels and spacers are used, then pitch and spacing precision is improved, but device complexity increases

Engineering Contradiction:
Improvepitch and spacing precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the patterning process into distinct stages: forming mandrels with first cuts, depositing spacers, forming block masks, and creating second cuts. This segmentation allows precise control over pitch and spacing by independently controlling each patterning step, resolving the contradiction between precision and complexity by breaking down the complex process into manageable, precisely controllable segments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by pre-forming mandrels with first cuts before spacer deposition, and pre-positioning block masks before second cuts are made. These preliminary actions establish the geometric framework that enables subsequent precise patterning, improving pitch and spacing control while making the overall complex process more systematic and controllable.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If optical lithography ground rules are followed, then manufacturing ease is maintained, but feature size reduction is limited

Engineering Contradiction:
Improvelithography process easeVSAvoidfeature size
Core Design Contradiction:
Ease of manufactureVSLength of moving object

Solution Approach 1:

The patent introduces mandrels and spacers as intermediary structures that enable feature size reduction beyond direct optical lithography limits. The mandrels serve as sacrificial intermediaries that define the final pattern geometry through self-aligned spacer formation, allowing sub-lithographic feature sizes to be achieved while maintaining manufacturing ease through established materials and processes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent transitions from two-dimensional planar patterning to three-dimensional self-aligned patterning by forming vertical spacers on mandrel sidewalls. This dimensional transition enables pitch multiplication and spacing control that are not constrained by optical lithography resolution limits, allowing feature size reduction while maintaining ease of manufacture through vertical rather than horizontal scaling.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the fabrication of BEOL interconnect structures with improved precision and control over pitch and spacing, enhancing the overall performance and efficiency of integrated circuit interconnects.

Implementation Method 1

depositing a first sacrificial layer over a dielectric layer, forming a block mask covering an area on the first sacrificial layer, and depositing a second sacrificial layer over the block mask and the first sacrificial layer

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

depositing a first sacrificial layer over a dielectric layer, forming a block mask covering an area on the first sacrificial layer, and depositing a second sacrificial layer over the block mask and the first sacrificial layer

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Data Source

PatentUS20190181040A1Interconnects with cuts formed by block patterning
Publication Date: 2019.06.13 GLOBALFOUNDRIES US INC
  • US20190181040A1 patent drawing
  • US20190181040A1 patent drawing
  • US20190181040A1 patent drawing

AI summary

Methods of fabricating an interconnect structure. A first sacrificial layer is deposited over a dielectric layer, and a block mask is formed that covers an area on the first sacrificial layer. A second sacrificial layer is deposited over the block mask and the first sacrificial layer. After the block mask is formed, the second sacrificial layer is patterned to form a mandrel that is arranged in part on a portion of the block mask.