BEOL MOM Capacitor Layout Using a Hi-R Shielding Conductor
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Solution Overview
Problem
There is a challenge in designing and fabricating high-density capacitors within the decreasing footprint of modern integrated circuit (IC) devices, particularly in optimizing IC area scaling and increasing metal oxide metal (MOM) density while reducing metal utilization in advanced technology nodes.
Innovation Solution
The implementation of a metal oxide metal (MOM) capacitor design that includes a first metal layer with alternating polarity fingers and a high resistance (Hi-R) conductor layer disposed adjacent to the metal layer, which can function as either an active layer or a shielding layer, allowing for increased capacitance density and improved metal layer utilization without requiring additional manufacturing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional capacitor designs are used, then manufacturing process is simpler, but capacitance density is lower
Solution Approach 1:
The patent introduces a high resistance conductor layer in a plane parallel to the metal layer, utilizing the vertical dimension (BEOL layers) to increase capacitance density without expanding the horizontal footprint. This multi-layer stacking approach allows capacitors to achieve higher density by exploiting the third dimension of the semiconductor structure.
Solution Approach 2:
The high resistance conductor layer serves dual functions: it acts as an active capacitor plate to store charge and simultaneously functions as a shielding layer to block electromagnetic interference. This multi-functionality increases capacitance density without requiring additional dedicated shielding structures, thereby optimizing metal layer utilization.
2Area of stationary object
If metal utilization is reduced, then IC area scaling is improved, but capacitor performance may deteriorate
Solution Approach 1:
By stacking capacitor layers vertically in the BEOL region, the patent achieves higher capacitance density within the same IC footprint. This vertical integration allows the capacitor to maintain or improve performance while reducing the horizontal area occupied, enabling better IC area scaling.
Solution Approach 2:
The high resistance conductor layer acts as an intermediary structure that provides both capacitive function and shielding function. This mediator layer enables the capacitor to achieve reliable performance with reduced metal utilization by efficiently utilizing the available BEOL space and providing electromagnetic isolation without requiring additional metal resources.
3Quantity of substance
If additional manufacturing steps are added, then capacitor density increases, but manufacturing complexity and cost increase
Solution Approach 1:
The high resistance conductor layer is designed to serve multiple purposes simultaneously - as an active capacitor plate and as a shielding layer. This multi-functionality allows the structure to achieve higher MOM density without requiring separate dedicated shielding layers or additional capacitor plates, thereby avoiding extra manufacturing steps and masking operations.
Solution Approach 2:
The patent combines the capacitive function and shielding function into a single integrated structure using the high resistance conductor layer. By merging these two functions that would traditionally require separate layers and processing steps, the invention achieves increased MOM density while maintaining manufacturing simplicity and avoiding additional fabrication complexity.
Data Source
AI summary
A metal oxide metal (MOM) capacitor and methods for fabricating the same are disclosed. The MOM capacitor includes a first metal layer having a first plurality of fingers, each of the first plurality of fingers configured to have alternating polarities. A high resistance (Hi-R) conductor layer is disposed adjacent the first metal layer in a plane parallel to the first metal layer.