BEOL Thin Film Resistor Integration With Memory and Copper Diffusion Barrier
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Solution Overview
Problem
Thin film resistors in semiconductor systems face misalignment and punch-through issues during etching processes, leading to integration challenges with memory devices in BEOL materials, and copper diffusion problems.
Innovation Solution
Integrating a thin film resistor with a memory device in the same BEOL materials, using the same insulator and conductor materials, and forming contact vias through the same interlevel dielectric material, with a thicker insulator layer to reduce copper diffusion, and employing photolithographic and etching processes to pattern the resistor and memory device structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If photolithography and etching processes are used to form electrical contacts to the thin film resistor, then the resistor can be integrated with memory devices, but misalignment and punch-through issues occur
Solution Approach 1:
A separate contact formation process using a contact layer is introduced as an intermediary step between the resistor formation and the final electrical connection. This contact layer serves as a mediator that absorbs the alignment tolerances and prevents direct exposure of the thin film resistor to the etching process, thereby eliminating punch-through issues while maintaining integration capability.
Solution Approach 2:
The electrical connection formation is divided into separate stages: first forming the contact layer independently, then subsequently forming the electrical contacts to this contact layer. This segmentation allows each process to be optimized independently, with the contact layer acting as a buffer that decouples the alignment requirements of the resistor formation from the contact formation processes.
2Ease of manufacture
If standard insulator thickness is used in BEOL materials, then device integration is simplified, but copper diffusion issues occur
Solution Approach 1:
The insulator layer thickness is made non-uniform: thicker in regions where copper diffusion protection is needed (adjacent to and beneath the thin film resistor), and standard thickness in other regions. This local variation provides targeted copper diffusion barrier functionality exactly where required, while maintaining standard integration simplicity in other areas of the device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces misalignment and copper diffusion issues, enabling accurate integration of thin film resistors with memory devices in BEOL materials, improving the reliability and performance of semiconductor structures.
Implementation Method 1
with a thicker insulator layer to reduce copper diffusion
Implementation Method 2
employing photolithographic and etching processes to pattern the resistor and memory device structures
Data Source
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to an integrated thin film resistor with a memory device and methods of manufacture. The structure includes a memory device in back end of line (BEOL) materials and a thin film resistor located in the BEOL materials. The thin film resistor includes electrical resistive material, and an insulator material over the electrical resistive material is thicker than insulator material over the memory device.