BEOL Thin Film Resistor Via Layout for Thermal Dissipation
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Solution Overview
Problem
Conventional BEOL resistors experience reduced thermal dissipation and increased resistance due to their placement further from the substrate, leading to issues like electromigration and joule heating, which compromise device performance.
Innovation Solution
The formation of contact vias that extend through or below the resistive layer, enhancing thermal dissipation and reducing electromigration by providing multiple contact interfaces and a lower level metal connection, thus improving resistor performance and current allowance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If BEOL resistors are placed further from the substrate to accommodate scaling, then device integration is improved, but thermal dissipation capability deteriorates
Solution Approach 1:
The patent introduces a vertical dimension solution by extending contact vias through or below the resistive layer to reach lower interconnect layers closer to the substrate. This multi-level vertical connection approach enables thermal dissipation pathways that bypass the thermal isolation caused by BEOL placement, resolving the contradiction between integration improvement and thermal dissipation degradation.
2Manufacturing precision
If BEOL resistors are placed further from the substrate, then resistance increases rapidly, but this placement is necessary for new technology nodes
Solution Approach 1:
The patent segments the electrical connection path into multiple sections by introducing contact vias that extend through or below the resistive layer to connect with lower interconnect layers. This segmentation creates multiple parallel current pathways, effectively reducing the total resistance and compensating for the increased resistance inherent in BEOL placement required for technology scaling.
3Ease of manufacture
If conventional contact vias are used above the resistive layer, then manufacturing is simplified, but electromigration and joule heating occur
Solution Approach 1:
The patent inverts the conventional via placement approach by extending contact vias through or below the resistive layer to connect with lower interconnect layers, rather than placing vias only above the resistive layer. This inversion positions the current-carrying vias away from the high-temperature resistive layer, significantly reducing electromigration and joule heating effects while maintaining manufacturing feasibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed resistive structures exhibit enhanced thermal dissipation, improved electromigration resistance, and higher current capacity without affecting device performance, while being resistant to void formation and temperature-related degradation.
Implementation Method 1
A contact via extending through the dielectric layer forms an electrical connection between the first interconnect layer and the resistive layer
Implementation Method 2
The proposed resistive structures exhibit enhanced thermal dissipation, improved electromigration resistance, and higher current capacity
Data Source
AI summary
Method and resistive structure is provided herein. The resistive structure includes a semiconductor substrate comprising one or more circuit elements and a first interconnect layer disposed on the substrate. The first interconnect layer is between a resistive layer and the semiconductor substrate. A dielectric layer is disposed between the first interconnect layer and the resistive layer. A via extending through the dielectric layer forms an electrical connection between the first interconnect layer and the resistive layer.