BEOL Embedded RRAM Structure for Low-Voltage Filament Formation
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Solution Overview
Problem
The challenge in forming back end of line (BEOL) embedded resistive random access memory (RRAM) structures is to achieve low forming voltages for filament formation while maintaining the integrity of BEOL interconnects, as high voltages lead to variability and reliability issues due to random filament formation, and conventional thermal budgets are limited, preventing the formation of large-grain crystallized dielectric layers necessary for neuromorphic devices.
Innovation Solution
The solution involves locally doping the dielectric film above a stud with dopants like silicon or zirconium and performing a laser anneal to promote crystallization and grain growth, reducing the crystallization threshold temperature and enabling better filament formation at lower voltages, while maintaining the thermal integrity of BEOL interconnects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high voltages are applied to form filaments in RRAM devices, then filament formation is achieved, but variability and reliability issues occur due to random filament formation
Solution Approach 1:
The patent applies local quality by introducing dopant regions with different compositions within the dielectric film. Specifically, a first dopant region with a first dopant concentration and a second dopant region with a second dopant concentration are created at different locations. This non-uniform dopant distribution creates localized areas with different electrical properties, enabling controlled filament formation at specific regions rather than random filament formation throughout the dielectric film, thereby improving both reliability and manufacturing precision.
2Manufacturing precision
If conventional thermal budgets are used, then BEOL interconnect integrity is maintained, but large-grain crystallized dielectric layers cannot be formed
Solution Approach 1:
The patent employs local quality by creating spatially varying dopant concentrations within the dielectric film. The first dopant region and second dopant region have different dopant types or concentrations, which creates localized areas that facilitate grain growth at lower temperatures. This allows large-grain crystallized structures to form in specific regions without requiring a uniform high thermal budget across the entire structure, thus enabling precise dielectric layer formation while maintaining BEOL interconnect integrity.
Solution Approach 2:
The patent applies parameter changes by modifying the dopant concentration and type as a function of position within the dielectric film. By varying the dopant parameters (concentration, species) between the first and second dopant regions, the crystallization behavior is locally optimized. This enables the formation of large-grain crystallized dielectric layers at reduced temperatures, as the dopant variations create nucleation sites and growth pathways that lower the effective crystallization temperature in critical regions.
3Manufacturing precision
If low voltages are used for filament formation, then variability is reduced, but filament formation becomes inconsistent without proper dielectric structure
Solution Approach 1:
The patent resolves this contradiction by implementing local quality through strategically positioned dopant regions. The first dopant region and second dopant region create localized areas with enhanced electrical activity and reduced formation voltage requirements. These dopant-rich regions serve as preferential sites for filament nucleation, enabling consistent and reliable filament formation at lower voltages. The non-uniform dopant distribution ensures that filaments form reliably at specific locations rather than randomly, achieving both consistency and reliability simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for consistent and controlled filament formation at lower voltages, reducing variability and enhancing the performance of RRAM devices by forming large-grain crystalline structures within the dielectric film, which is essential for neuromorphic computing applications.
Implementation Method 1
performing a laser anneal to promote crystallization and grain growth
Implementation Method 2
performing a laser anneal to promote crystallization and grain growth
Implementation Method 3
Locally doping may include ion implantation of doping atoms
Data Source
AI summary
A semiconductor structure may include a resistive random access memory device embedded between an upper metal interconnect and a lower metal interconnect in a backend structure of a chip. The resistive random access memory may include a bottom electrode and a top electrode separated by a dielectric film. A portion of the dielectric film directly above the bottom electrode may be doped and crystalline. The semiconductor structure may include a stud below and in electrical contact with the bottom electrode and the lower metal interconnect and a dielectric layer between the upper metal interconnect and the lower metal interconnect. The dielectric layer may separate the upper metal interconnect from the lower metal interconnect. The crystalline portion of the dielectric film may include grain boundaries that extend through an entire thickness of the dielectric film. The crystalline portion of the dielectric film may include grains.