BEOL Thin-Film Transistor Stacking for Flat Gate and Channel Layers

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Solution Overview

Problem

Conventional back-end-of-line (BEOL) thin film transistors face challenges in achieving flatness and low roughness of back-gate, high-k dielectric, and channel layers due to metal grain effects and galvanic erosion, affecting electrical performance and reliability.

Innovation Solution

A semiconductor device with a thin film transistor structure where the back-gate, high-k dielectric, and channel layers are formed using direct film stacking without intermediate planarization or lithography steps, and a protection structure is used to maintain layer flatness and prevent hydrogen ion intake and moisture absorption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional planarization steps are used to address uneven back-gate surface, then surface flatness can be improved, but manufacturing complexity and process steps increase

Engineering Contradiction:
Improvesurface flatnessVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the planarization step from the conventional fabrication process by using intrinsically flat back-gate materials (titanium nitride, tantalum nitride) that do not require additional processing to achieve the desired surface flatness for subsequent high-k dielectric layer deposition

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the material parameters of the back-gate electrode from conventional metals with grain effects to nitride-based materials that inherently provide flat surfaces, thereby eliminating the need for planarization while maintaining electrical performance

Inventive Principle:
Principle #35Parameter changes

2Reliability

If protection structures are added to prevent hydrogen ion intake and moisture absorption, then device reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedevice reliabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The back-gate electrode structure serves multiple functions simultaneously: it provides electrical connectivity, maintains surface flatness, and acts as a protective barrier against hydrogen ion intake and moisture absorption, thereby improving reliability without adding separate protection structures

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The use of nitride-based materials (titanium nitride, tantalum nitride) combines electrical conductivity with inherent protective properties against hydrogen and moisture, creating a composite material that eliminates the need for separate protection layers

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in transistors with ideal flatness and low roughness of the back-gate, high-k dielectric, and channel layers, enhancing electrical performance and reliability while reducing the number of patterning steps required.

Implementation Method 1

A method of forming back-gate, high-k dielectric, and channel layers with ideal flatness and low roughness by direct film stacking without planarization steps

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

forming a protection structure to prevent hydrogen ion intake and moisture absorption

Methodology Applied
Scientific EffectAdsorption: Adsorption

Data Source

PatentUS20240128378A1Semiconductor device and method of fabricating the same
Publication Date: 2024.04.18 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240128378A1 patent drawing
  • US20240128378A1 patent drawing
  • US20240128378A1 patent drawing

AI summary

A semiconductor device includes a first transistor and a protection structure. The first transistor includes a gate electrode, a gate dielectric disposed on the gate electrode, and a channel layer disposed on the gate dielectric. The protection structure is laterally surrounding the gate electrode, the gate dielectric and the channel layer of the first transistor. The protection structure includes a first capping layer and a dielectric portion. The first capping layer is laterally surrounding and contacting the gate electrode, the gate dielectric and the channel layer of the first transistor. The dielectric portion is disposed on the first capping layer and laterally surrounding the first transistor.