BEOL TMD Transistors for On-Die Voltage Regulation
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Solution Overview
Problem
Semiconductor packages face challenges in voltage regulation due to the space taken up by CMOS transistors in the FEOL region, which hinders die scaling and functionality.
Innovation Solution
Incorporating transition metal dichalcogenide (TMD) transistors in the BEOL region of the die for voltage regulation, allowing for reduced die size or increased functionality without compromising voltage regulation capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If CMOS transistors are used in the FEOL region for voltage regulation, then voltage regulation capability is maintained, but die area is consumed and scaling is hindered
Solution Approach 1:
The patent moves the voltage regulation transistors from the traditional FEOL (front-end-of-line) planar region to the BEOL (back-end-of-line) vertical stack region. This dimensional transition from 2D planar to 3D vertical architecture allows voltage regulation functionality to be achieved without consuming additional die area, as the transistors are stacked above other structures rather than placed side-by-side.
Solution Approach 2:
The voltage regulation transistors are nested within the BEOL interconnect stack, utilizing the vertical space above the FEOL region. This nesting approach allows multiple functional layers to coexist in a compact volume, with the voltage regulation circuitry embedded within the interconnect structure rather than occupying separate planar space.
2Reliability
If more space is allocated to voltage regulation circuitry, then voltage regulation performance is improved, but space for additional transistors and functionality is reduced
Solution Approach 1:
By transitioning to 3D vertical stacking in the BEOL region, the patent enables both voltage regulation functionality and additional transistor capacity to coexist on the same die. The vertical dimension provides extra functional capacity without sacrificing planar area needed for additional circuitry and features.
Solution Approach 2:
The patent segments the die into distinct functional regions: FEOL for primary logic and computation, and BEOL for voltage regulation and support functions. This segmentation allows each region to be optimized independently, with voltage regulation performance enhanced in the BEOL while FEOL remains available for high-density logic implementation.
3Productivity
If die size is reduced for scaling, then integration density is improved, but space for voltage regulation circuitry is reduced
Solution Approach 1:
The patent resolves the scaling contradiction by moving voltage regulation from 2D planar to 3D vertical architecture. This allows the die footprint to be reduced for higher integration density while the vertical stack in the BEOL region provides sufficient space for voltage regulation circuitry, effectively decoupling die area from voltage regulation capacity.
Solution Approach 2:
The BEOL interconnect stack acts as a flexible vertical structure that can accommodate voltage regulation transistors in a thin-film-like configuration above the FEOL region. This allows voltage regulation functionality to be integrated into the interconnect architecture itself, utilizing vertical space that would otherwise be unused and maintaining regulation capability even as die area is reduced.
Data Source
AI summary
A microelectronic device, a semiconductor package including the device, an IC device assembly including the package, and a method of making the device. The device includes a substrate; a first structure on the substrate, the first structure corresponding to a front end of line (FEOL) stack of the device and including a plurality of first transistors therein; and a second structure on the substrate, the second structure corresponding to a back end of line (BEOL) stack of the device, and including a plurality of second transistors therein, the plurality of second transistors including a transition metal dichalcogenide (TMD) material. The second transistors are part of a voltage regulation architecture to regulate voltage supply to the die.