BEOL Wiring Structures with Etch Stop Layer for RF ICs
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Solution Overview
Problem
Conventional BEOL wiring structures with on-chip passive elements, such as MIM capacitors and thin film resistors, are prone to damage due to overetching during the formation of multiple-depth vias, leading to potential short circuits and catastrophic failures as the height difference between vias decreases, exacerbating the sensitivity to overetch and increasing the risk of punchthrough events.
Innovation Solution
Incorporating a conductive layer as an etch stop within the BEOL wiring structure to prevent deepening of vias into the passive elements, ensuring that vias are formed without penetrating through the conductive plates of MIM capacitors or thin film resistors, thereby preventing damage and failures associated with overetching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple-depth vias are formed in BEOL wiring structures with on-chip passive elements, then electrical connectivity to different depths is achieved, but overetching causes via deepening that penetrates through conductive plates leading to short circuits and catastrophic failures
Solution Approach 1:
An etch stop layer is deposited over the passive element structure before via formation to prevent overetching. This preliminary protective action ensures that subsequent etching processes will not penetrate through the conductive plates of MIM capacitors or thin film resistors, thereby preventing short circuits and catastrophic failures while maintaining the ability to form multiple-depth vias for electrical connectivity.
2Manufacturing precision
If via height is scaled downwardly to reduce height difference among multiple depth vias, then manufacturing precision is improved, but sensitivity to overetch is exacerbated increasing punchthrough risk
Solution Approach 1:
The etch stop layer is deposited in advance over the passive element structure before via formation begins. This preliminary protective measure ensures that even as via heights are scaled downward and height differences among multiple depth vias are reduced, the etch stop layer remains as a safeguard against overetching, preventing the exacerbated sensitivity from leading to punchthrough events.
3Reliability
If refractory materials like TaN and TiN are used for MIM capacitors and thin film resistors, then electrical and mechanical properties are improved, but overetch penetration through these materials causes conductive plate shorting
Solution Approach 1:
An etch stop layer is introduced as an intermediary protective layer between the etching process and the refractory material passive elements (MIM capacitors and thin film resistors). This intermediary layer prevents the etching process from penetrating through the conductive plates, thereby eliminating the harmful effect of conductive plate shorting while preserving the superior electrical and mechanical properties of the refractory materials.
Data Source
AI summary
Back-end-of-line (BEOL) wiring structures that include a passive element, such as a thin film resistor or a metal-insulator-metal capacitor, and multiple-height vias in a metallization level, as well as design structures for a radiofrequency integrated circuit. The wiring structures generally include a first metal-filled via in a dielectric layer having sidewalls that intersect the passive element and a second metal-filled via in the dielectric layer with sidewalls that do not intersect the passive element. The bottom of the first via includes a conductive layer that operates as an etch stop to prevent deepening of the sidewalls of the first via into a portion of the passive element when the second via is fully etched through the dielectric layer. A liner is applied to the layer of conductive material and the sidewalls of the first via, and the remaining space is filled with another conductive layer.