BER Calculation Using BIP-8 Error Bits in OTN
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Solution Overview
Problem
The high cost of dedicated integrated circuits for FEC algorithms in OTN networks makes it economically challenging to determine bit error rates (BER) effectively, especially when dealing with multiple optical channels and fibers.
Innovation Solution
Implementing simple logic circuits to encode and decode error-determining bits within Optical Transport Unit frames, using fewer bits than the frame itself, allowing for BER calculation without decoding FEC bits, and employing FPGA or ASICs to reduce the need for expensive FEC integrated circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If FEC integrated circuits are used to determine BER in OTN networks, then measurement precision is improved, but device complexity and cost increase
Solution Approach 1:
The patent segments the error detection function from the complete FEC decoding process. Instead of using full FEC circuits to determine BER, the invention extracts and processes only the error-determining bits (BIP-8 bytes) from the OTN frame structure. This segmentation allows BER measurement without requiring complex FEC integrated circuits, resolving the contradiction between measurement precision and device complexity.
Solution Approach 2:
The patent extracts the essential error-detection information (BIP-8 error-determining bits) from the OTN frames and uses only this extracted information for BER calculation. By taking out just the necessary error-detection components rather than processing entire FEC-coded data, the system achieves accurate BER measurement without the complexity and cost of full FEC integrated circuits.
2Reliability
If FEC integrated circuits are deployed for multiple optical channels, then reliability is improved, but cost increases significantly
Solution Approach 1:
The patent replaces expensive FEC integrated circuits with simple logic circuits that process only error-determining bits. These simplified circuits are much cheaper to manufacture and deploy, especially when multiple optical channels and fibers need to be monitored. The invention uses disposable, low-cost logic circuits instead of expensive, complex FEC circuits, significantly reducing network deployment costs while maintaining reliability monitoring capability.
3Device complexity
If simple logic circuits are used instead of FEC circuits, then device complexity is reduced, but measurement precision may deteriorate
Solution Approach 1:
The patent introduces BIP-8 error-determining bits as an intermediary element that bridges the gap between simple logic circuits and accurate BER measurement. These intermediary bits are embedded in the OTN frame structure and contain sufficient error-detection information to enable accurate BER calculation using simple logic circuits, thus maintaining measurement precision while reducing device complexity.
Data Source
AI summary
Transport network interfaces operate to transport for Optical Transport Unit frames over an Optical Transport Network. Besides FEC bits for the Optical Transport Unit frames, the transmitting transport network interface provides sequences of error-determining bits for the Optical Transport Unit frames sent on working and protection communications channels. There is at least one sequence for each Optical Transport Unit frame, the number of bits in the at least one sequence much smaller than the number of bits in the Optical Transport Unit frame. The receiving transport network interface determines the bit error rates for the working and protection channels from the sequences of error-determining bits without decoding said Forward Error Correction bits and can select the working and protection channels accordingly.