BER Checker Bypassing Deserializer for Eye Viewer Testing

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Solution Overview

Problem

In high-speed serial interface receivers, such as those in Stratix IV GX or GT devices, performing bit error rate (BER) checking on data output by the eye viewer is hindered by the sharing of deserializer resources between BER checking and clock data recovery circuitry, preventing simultaneous use of the eye viewer for BER checking without interrupting the normal data path.

Innovation Solution

An integrated circuit (IC) with an eye viewer and a dedicated BER checker that receives a serial data signal directly from the eye viewer, bypassing the deserializer, allowing for BER determination without impacting the normal data link between the clock data recovery and deserializer, and optionally using soft IP within the IC core for BER checking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the data from the eye viewer is sent to the device core via the deserializer for BER checking, then BER checking can be performed, but the deserializer is shared between BER checking and clock data recovery circuitry, preventing simultaneous use of the eye viewer for BER checking without interrupting the normal data path

Engineering Contradiction:
ImproveBER checking capabilityVSAvoidsimultaneous use of eye viewer
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent segments the BER checking function from the deserializer by providing a dedicated BER checker that receives serial data directly from the eye viewer, separate from the deserializer path. This allows the deserializer to be used exclusively for normal data reception while the BER checker independently performs error rate analysis on eye viewer data without conflict or resource sharing.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If a dedicated BER checker is implemented outside the IC core, then BER checking can be performed without sharing deserializer resources, but additional hardware components are required

Engineering Contradiction:
Improveindependent BER checkingVSAvoidhardware components
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces a dedicated BER checker as an intermediary component that sits between the eye viewer and the error analysis function. This mediator receives serial data directly from the eye viewer, performs BER checking independently, and reports results without requiring integration into the IC core or sharing of the deserializer, thus simplifying the overall system architecture while maintaining functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If soft IP is used in the device core for BER checking, then BER checking can be implemented, but IC costs increase

Engineering Contradiction:
ImproveBER checking functionVSAvoidIC costs
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent employs a dedicated BER checker implemented as simple, fixed-function hardware logic rather than expensive soft IP cores. This approach uses basic digital logic components that are inexpensive to manufacture and integrate, providing the necessary BER checking functionality without the high costs associated with programmable soft IP implementations in the device core.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS8433958B2Bit error rate checker receiving serial data signal from an eye viewer
Publication Date: 2013.04.30 ALTERA CORP
  • US8433958B2 patent drawing
  • US8433958B2 patent drawing
  • US8433958B2 patent drawing

AI summary

An IC that includes an eye viewer and a BER checker coupled to the eye viewer, where the BER checker receives a serial data signal from the eye viewer, is provided. In one implementation, the BER checker receives the serial data signal from the eye viewer without the serial data signal passing through a deserializer. In one implementation, the BER checker compares the serial data signal against a reference data signal to determine the BER for the serial data signal. In one implementation, the IC includes an IC core coupled to the eye viewer and the BER checker, where the BER checker is outside the IC core. In one implementation, the BER checker is a dedicated BER checker. In one implementation, the BER checker includes an exclusive OR gate, a programmable delay circuit coupled to the exclusive OR gate, and an error counter coupled to the exclusive OR gate.