Fast Bit Error Rate Estimation in Nonvolatile Memory

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Solution Overview

Problem

Nonvolatile memory systems face challenges in efficiently detecting and correcting bit errors, which can require significant time and resources, especially when using Error Correction Codes (ECC).

Innovation Solution

The method involves rapidly estimating the Bit Error Rate (BER) by recording and comparing the distribution of data states during storage and read operations, allowing for appropriate data handling schemes to be selected, such as on-chip copying or ECC correction, based on calculated error rates, and using test data to extrapolate error rates for user data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Error Correction Codes (ECC) are used to detect and correct bit errors in nonvolatile memory, then data reliability is improved, but processing time and resource consumption increase significantly

Engineering Contradiction:
Improvedata reliabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by implementing a two-stage error handling approach: first performing a fast BER estimation on a sample or subset of data to determine the error rate, and only then applying full ECC correction when necessary. This avoids the excessive time consumption of ECC on all data while maintaining reliability when errors are present.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent introduces BER estimation as an intermediary step between data reading and ECC correction. This intermediary mechanism quickly assesses error rates and acts as a gatekeeper, determining whether full ECC processing is needed, thereby reducing overall processing time while maintaining data reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If Error Correction Codes (ECC) are applied to all data reads, then data reliability is improved, but resource utilization increases significantly

Engineering Contradiction:
Improvedata reliabilityVSAvoidresource utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements partial action by applying ECC only to data that exhibits error patterns above a certain threshold. The BER estimation mechanism identifies which data portions actually need correction, avoiding the waste of computational resources on error-free data while ensuring reliability for problematic data.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent uses feedback from BER estimation results to dynamically control ECC application. The system continuously monitors error rates and adjusts ECC processing accordingly, applying correction resources only when the feedback indicates errors are present, thereby optimizing resource utilization while maintaining reliability.

Inventive Principle:
Principle #23Feedback

3Speed

If fast BER estimation is performed by comparing data distribution shapes, then processing speed is improved, but measurement precision may be reduced compared to full ECC analysis

Engineering Contradiction:
Improveprocessing speedVSAvoiderror rate measurement precision
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by performing BER estimation through data distribution shape comparison before committing to full ECC processing. This preliminary assessment provides a quick indication of error rates that is sufficiently precise for decision-making, enabling fast triage while maintaining adequate measurement precision for determining whether further correction is needed.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9483339B2Systems and methods for fast bit error rate estimation
Publication Date: 2016.11.01 SANDISK TECHNOLOGIES LLC
  • US9483339B2 patent drawing
  • US9483339B2 patent drawing
  • US9483339B2 patent drawing

AI summary

Changes in the distribution of memory cells across memory states allow calculation of Bit Error Rate (BER). Comparison of test data stored in memory and a known good copy of the test data provides test data BER from which user data BER may be obtained. Data may be handled differently according to its BER.