BeO-Based Dielectric Layer for High-K DRAM Capacitors

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Solution Overview

Problem

Current semiconductor memory devices face challenges in achieving high integration density and low leakage current due to the limitations of dielectric materials with high dielectric constants, as they often have small band gaps and require increased layer thickness, which is not feasible in ultra-large-scale integration (ULSI) dynamic random-access memory (DRAM) devices with design rules of 20 nm or less.

Innovation Solution

A dielectric layer with a rocksalt structure, composed of a compound with a chemical formula BexM1-xO, where M includes alkaline earth metals, is developed using an atomic layer deposition (ALD) process, allowing for a high dielectric constant and large band gap, suitable for use in semiconductor memory devices, particularly in 10-nm-level DRAM devices, by forming a solid solution without phase separation between beryllium oxide (BeO) and alkaline earth metal oxides like magnesium (Mg) or strontium (Sr) oxides.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Force

If a material with high dielectric constant (e.g., TiO2 or SrTiO3) is used to increase capacitance, then the dielectric constant increases, but the band gap decreases leading to increased leakage current

Engineering Contradiction:
Improvedielectric constantVSAvoidleakage current
Core Design Contradiction:
ForceVSReliability

Solution Approach 1:

The patent uses a composite material system consisting of beryllium oxide (BeO) as the base material with metal element dopants (Mg, Ca, Sr, Ba, or Zn) to create a dielectric layer that achieves both high dielectric constant and large band gap. The composite structure allows combining the high-k properties of BeO with the band gap characteristics of the dopant metals, resolving the contradiction between high capacitance and low leakage current.

Inventive Principle:
Principle #40Composite materials

2Reliability

If layer thickness is increased to reduce leakage current in high-k materials, then leakage current decreases, but the device size increases which is not feasible for 20 nm or less design rules

Engineering Contradiction:
Improveleakage currentVSAvoidlayer thickness
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The patent changes the material parameters by introducing metal element dopants into the BeO lattice, which modifies the electronic structure and band gap characteristics. This allows achieving low leakage current at very thin thicknesses (5 nm or less) by enhancing the material's intrinsic properties rather than increasing thickness, thus complying with 20 nm design rules.

Inventive Principle:
Principle #35Parameter changes

3Force

If existing high-k materials (e.g., SrTiO3 requiring thickness ≥10 nm) are used, then high dielectric constant is achieved, but the minimum thickness requirement cannot be met for 10 nm-level DRAM devices

Engineering Contradiction:
Improvedielectric constantVSAvoidminimum layer thickness
Core Design Contradiction:
ForceVSManufacturing precision

Solution Approach 1:

The patent applies local quality enhancement by doping specific metal elements into the BeO lattice at controlled concentrations. This creates localized regions with enhanced dielectric properties and improved band gap characteristics, allowing the thin dielectric layer (5 nm or less) to achieve both high capacitance and low leakage current, meeting the stringent requirements of 10 nm-level DRAM devices.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables a high dielectric constant and low leakage current characteristics, suitable for next-generation DRAM devices, by stabilizing the rocksalt structure at room temperature and maintaining a thin layer thickness, overcoming the limitations of existing materials in achieving both high capacitance and low leakage current.

Implementation Method 1

A dielectric layer with a rocksalt structure, composed of a compound with a chemical formula BexM1-xO, where M includes alkaline earth metals, is developed using an atomic layer deposition (ALD) process

Methodology Applied
Scientific EffectAtomic layer deposition:

Data Source

PatentUS11417516B2Dielectric layer and a semiconductor memory device including the dielectric layer as a capacitor dielectric layer
Publication Date: 2022.08.16 KOREA INST OF SCI & TECH
  • US11417516B2 patent drawing
  • US11417516B2 patent drawing
  • US11417516B2 patent drawing

AI summary

Provided is a dielectric layer that has a rock salt structure in a room temperature stable phase. The dielectric layer is made of a compound having a chemical formula of BexM1-xO, where M includes one of alkaline earth metals and x has a value greater than 0 and not greater than 0.19. A semiconductor memory device also is provided that includes a capacitor composed of a lower electrode; a dielectric layer disposed on the lower electrode; and an upper electrode disposed on the dielectric layer, wherein the dielectric layer has a rocksalt structure in a room temperature stable phase and is made of a compound having a chemical formula shown below,BexM1-xO,where M comprises an alkaline earth metal and x has a value greater than 0 and not greater than 0.19.