Beta-Tungsten Liner Filling for High-Aspect-Ratio Memory Contacts
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Solution Overview
Problem
Conventional microelectronic device manufacturing methods face issues with poor step coverage and undesirable electrical resistance due to void spaces and small grain sizes in conductive structures, especially at high aspect ratios, leading to reduced feature density and performance.
Innovation Solution
A method involving the formation of a conductive structure with a barrier structure and a conductive liner structure, where the conductive liner is converted from a semiconductive material to beta-phase tungsten, enhancing coverage and reducing electrical resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional filling methods are used for high aspect ratio openings, then the manufacturing process is simple, but poor step coverage and void spaces occur leading to defective conductive structures
Solution Approach 1:
The filling process is divided into multiple sequential stages: initial conductive material deposition, mandrel formation, mandrel removal, and secondary conductive material deposition. This segmentation allows each stage to be optimized independently, achieving complete void-free filling of high aspect ratio openings while maintaining process control
Solution Approach 2:
A mandrel structure is formed preliminarily within the opening before the final conductive material is deposited. This preliminary structure serves as a template that guides the conductive material to fill the entire opening uniformly, ensuring complete step coverage without voids, and is subsequently removed to leave the desired conductive structure
2Reliability
If barrier material is formed to line the opening surfaces, then material interaction is impeded, but horizontal dimensions of the conductive structure are reduced
Solution Approach 1:
The barrier material thickness is precisely controlled within a narrow range (1-3 nm) through atomic layer deposition. This parameter optimization provides sufficient protection against material interactions and diffusion while minimizing the horizontal footprint reduction, allowing the conductive structure to maintain larger effective dimensions
Solution Approach 2:
A composite structure is formed with multiple functional layers: barrier material for chemical protection, liner material for adhesion and additional diffusion prevention, and conductive material for electrical function. This composite approach distributes functions across layers, allowing each layer to be optimized for its specific role while maintaining overall structure integrity
3Quantity of substance
If small grain sizes are achieved in the conductive structure, then material density increases, but electrical resistance becomes undesirable
Solution Approach 1:
The conductive material undergoes controlled phase transitions during deposition and subsequent thermal processing. By controlling the deposition conditions and applying targeted annealing treatments, the material transforms from a fine-grained high-density state to a coarser-grained low-resistance state, achieving both high material density and desirable electrical properties
Solution Approach 2:
Deposition parameters such as temperature, pressure, and material flux are precisely controlled during the filling process to influence grain formation. Subsequent thermal processing parameters (temperature, time, atmosphere) are optimized to promote grain growth and reduce resistance while maintaining the high density achieved during deposition
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves feature density and electrical performance by ensuring complete filling and stable conductive structures with beta-phase tungsten, addressing the limitations of conventional methods.
Implementation Method 1
the conductive liner is converted from a semiconductive material to beta-phase tungsten
Data Source
AI summary
A microelectronic device includes a first conductive structure, a barrier structure, a conductive liner structure, and a second conductive structure. The first conductive structure is within a first filled opening in a first dielectric structure. The barrier structure is within the first filled opening in the first dielectric structure and vertically overlies the first conductive structure. The conductive liner structure is on the barrier structure and is within a second filled opening in a second dielectric structure vertically overlying the first dielectric structure. The second conductive structure vertically overlies and is horizontally surrounded by the conductive liner structure within the second filled opening in the second dielectric structure. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.