Betavoltaic Cell Stacking With Bi-Polar Contacts for Higher Power Density
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Solution Overview
Problem
Existing betavoltaic devices face challenges in achieving high power density and efficiency due to the use of volumetrically inefficient interconnect components like through-vias, conductive traces, and wires, which reduce active area and increase manufacturing costs, while also posing reliability issues and degrading performance.
Innovation Solution
The implementation of bi-polar contacts on both surfaces of betavoltaic cells, allowing for series and parallel stacked configurations without interposers or through-vias, optimizing the physical and electrical arrangement for compact, cost-effective power generation by eliminating unnecessary materials and minimizing shadowing effects on the radioactive source.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional interconnect components (through-vias, conductive traces, wires) are used to connect betavoltaic cells, then electrical connectivity is achieved, but active area is reduced and manufacturing cost increases
Solution Approach 1:
The patent merges the interconnect function directly into the semiconductor substrate by forming conductive regions that extend through multiple junctions. This integration eliminates separate interconnect components (through-vias, traces, wires) while maintaining electrical connectivity, thereby preserving active area and reducing manufacturing complexity
Solution Approach 2:
The patent extracts and eliminates unnecessary intermediate interconnect components from the system. By using conductive regions formed directly in the semiconductor substrate, it removes through-vias, conductive traces, and wires that would otherwise occupy valuable active area and increase manufacturing cost
2Reliability
If through-vias are used for interconnection, then electrical connectivity is established, but manufacturing cost and device complexity increase
Solution Approach 1:
The patent combines the interconnect function with the semiconductor substrate structure itself. Conductive regions are formed as integral parts of the substrate during standard semiconductor processing, merging what would be separate components into a unified structure, thereby reducing device complexity and manufacturing cost
Solution Approach 2:
The conductive regions in the semiconductor substrate serve multiple functions simultaneously: they provide electrical connectivity for series and parallel interconnection of betavoltaic junctions, and they are formed using standard semiconductor processing techniques. This multi-functionality reduces the need for specialized interconnect structures
3Object-affected harmful factors
If low-energy beta emitting radioisotopes are used, then radiation safety is improved, but power density decreases
Solution Approach 1:
The patent segments the betavoltaic device into multiple individual junctions that can be connected in series and/or parallel configurations. This segmentation allows the device to achieve higher power density by combining multiple low-energy beta emitting junctions, while maintaining radiation safety through the use of low-energy radioisotopes in each junction
Solution Approach 2:
The patent transitions from a single junction configuration to a multi-junction stacked arrangement with series and parallel interconnection options. This dimensional expansion in the electrical connection topology enables power density enhancement while maintaining the safety benefits of low-energy beta emitting radioisotopes
4Power
If compact stacked configurations are used, then power density is increased, but interconnection efficiency becomes more challenging
Solution Approach 1:
The patent merges the interconnection function into the semiconductor substrate by forming conductive regions that directly connect multiple betavoltaic junctions in compact stacked configurations. This integration simplifies manufacturing by eliminating the need for separate interconnect components and their associated alignment and bonding processes
Solution Approach 2:
The conductive regions for interconnection are formed preliminarily during the standard semiconductor fabrication process, before the betavoltaic junctions are fully assembled and activated. This preliminary formation of interconnect structures simplifies subsequent stacking and assembly operations, making compact configurations more manufacturable
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of compact, high-power density betavoltaic devices with improved tunability of voltage and current, reducing manufacturing costs and enhancing performance by maximizing active area exposure to the radioactive source.
Implementation Method 1
the direct conversion of radioisotope beta (electron) emissions into usable electrical power via beta emissions directly impinging on a semiconductor junction device
Implementation Method 2
Incident beta particles absorbed in a semiconductor create electron-hole-pairs (EHPs) that are accelerated by the built-in field to device terminals
Data Source
AI summary
A device for producing electricity. The device includes a substrate having spaced apart first and second surfaces and doped a first dopant type, first semiconductor material layers disposed atop the first substrate surface and doped the first dopant type, and second semiconductor material layers disposed atop the first semiconductor material layers and doped a second dopant type. A first contact is in electrical contact with the second substrate surface or in electrical contact with one of the first semiconductor material layers. A beta particle source emits beta particles that penetrate into the semiconductor material layers; the beta particle source is proximate the uppermost layer of the second plurality of semiconductor material layers. A second contact is in electrical contact with one of the second plurality of semiconductor material layers. In one embodiment, bi-polar contacts (the first and second contacts) are co-located on each major face of the device.