BF16 Square Root Instructions for Precision-Speed AI Computing

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Solution Overview

Problem

Existing machine learning and artificial intelligence applications face challenges in efficiently performing deep learning tasks due to the limited range and precision of IEEE-754 32-bit (FP32) and 64-bit (FP64) arithmetic, which are not well-suited for training deep neural networks, and lower-precision arithmetic solutions do not adequately address these issues.

Innovation Solution

The implementation of BF16 (Brain Floating Point) instructions for calculating square roots and reciprocal square roots, which provide improved precision and range without compromising on performance, utilizing native BF16 circuitry and supporting denormal inputs, various rounding modes, and predicate registers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If IEEE-754 32-bit (FP32) and 64-bit (FP64) arithmetic is used, then precision and range are maintained, but computational speed and efficiency deteriorate

Engineering Contradiction:
ImproveprecisionVSAvoidcomputational speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent changes the precision parameter from standard IEEE-754 FP32/FP64 to BF16 format, which uses 16 bits with 8 bits for exponent and 7 bits for fraction. This parameter change allows computational speed to improve disproportionately while maintaining sufficient precision for machine learning applications, resolving the contradiction between precision and speed

Inventive Principle:
Principle #35Parameter changes

2Speed

If reduced precision arithmetic is used, then computational speed is improved, but precision and range deteriorate

Engineering Contradiction:
Improvecomputational speedVSAvoidprecision
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The patent optimizes the precision parameters by using BF16 format with specifically configured exponent and fraction bit allocations. This parameter optimization achieves disproportionate speed improvement while maintaining adequate precision for deep neural network training, addressing the trade-off between speed and precision

Inventive Principle:
Principle #35Parameter changes

3Productivity

If BF16 data format is used, then computational efficiency is improved, but compatibility with existing FP32/FP64 systems deteriorates

Engineering Contradiction:
Improvecomputational efficiencyVSAvoidcompatibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent introduces BF16 as an intermediary data format that bridges the gap between high-precision FP32/FP64 systems and low-precision efficient computing requirements. This intermediary format enables compatibility with existing systems while achieving improved computational efficiency for machine learning workloads

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12608175B2BFLOAT16 square root and/or reciprocal square root instructions
Publication Date: 2026.04.21 INTEL CORP
  • US12608175B2 patent drawing
  • US12608175B2 patent drawing
  • US12608175B2 patent drawing

AI summary

Techniques for performing square root or reciprocal square root calculations on BF16 data elements in response to an instruction are described. An example of an instruction is one that includes fields for an opcode, an identification of a location of a packed data source operand, and an identification of a packed data destination operand, wherein the opcode is to indicate that execution circuitry is to perform, for each data element position of the packed data source operand, a calculation of a square root value of a BF16 data element in that position and store a result of each square root into a corresponding data element position of the packed data destination operand.