BGA Package Wiring Layer Shielding for Noise Reduction
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Solution Overview
Problem
Existing semiconductor devices with BGA package structures face challenges in reducing mutual inductance between external output and input signal systems, leading to noise induction during parallel input/output operations, particularly due to the lack of shielding between wiring layers and the WPP structure's planar layout.
Innovation Solution
The implementation of a semiconductor device with a package substrate featuring multiple wiring layers, including a third shielding layer between the first and second wiring layers, and orthogonal leader wiring layouts to reduce mutual inductance, along with strategic placement of external ground and power terminals to act as electromagnetic shields, effectively reducing noise induction between external output and input signal systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If external output and input operations are performed in parallel, then productivity is improved, but noise voltage is induced due to mutual inductance between adjacent wirings
Solution Approach 1:
A shielding wiring is introduced as an intermediary element between the external output signal wiring and external input signal wiring. This shielding wiring acts as a mediator that blocks electromagnetic coupling, preventing noise voltage induction while allowing both output and input operations to proceed in parallel without interference
Solution Approach 2:
The wiring structure is segmented into distinct functional zones by introducing a dedicated shielding layer. This segmentation separates the output signal path from the input signal path, allowing independent operation of each signal system while maintaining physical proximity for compact packaging
2Ease of manufacture
If through-holes are arranged orderly to increase wiring freedom, then ease of manufacture is improved, but mutual inductance between output and input wirings is not sufficiently reduced
Solution Approach 1:
The solution moves from two-dimensional wiring layout optimization to three-dimensional shielding structure implementation. By adding a vertical shielding layer between wiring layers, the patent addresses mutual inductance in the depth dimension while maintaining freedom in the horizontal wiring arrangement
3Ease of operation
If leader wirings are arranged in planar layout, then ease of operation is improved, but inductance component increases leading to noise induction
Solution Approach 1:
The shielding wiring serves as an intermediary barrier between leader wirings and external signal wirings, reducing the effective inductance coupling while preserving the simplicity of planar layout for leader wiring connections
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces noise voltage induction from the external output signal system to the input signal system, enhancing noise resistance and the degree of freedom in wiring layout, thereby improving the reliability of parallel input/output operations.
Implementation Method 1
a third shielding layer between the first and second wiring layers
Implementation Method 2
noise voltage in proportion to mutual inductance
Implementation Method 3
strategic placement of external ground and power terminals to act as electromagnetic shields
Data Source
AI summary
Mutual inductance from an external output signal system to an external input signal system, in which parallel input/output operation is enabled, is reduced. A semiconductor integrated circuit has a plurality of external connection terminals facing a package substrate, and has an external input terminal and an external output terminal, in which parallel input/output operation is enabled, as part of the external connection terminals. The package substrate has a plurality of wiring layers for electrically connecting between the external connection terminals and module terminals corresponding to each other. A first wiring layer facing the semiconductor integrated circuit has a major wiring for connecting between the external input terminal and a module terminal corresponding to each other, and a second wiring layer in which the module terminals are formed has a major wiring for connecting between an external output terminal and a module terminal corresponding to each other. A major signal wiring of an external output system connected to the external output terminal, which may be a noise source, is made to be in a wiring layer distant from the semiconductor integrated circuit.