BGA Package Layout With PCB Cutout for Thin Thermal Stacks
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Solution Overview
Problem
Conventional ball grid array (BGA) packaging in information handling systems faces challenges in reducing thickness while maintaining performance and functionality, as reducing dimensions leads to overheating and limited circuit paths due to the need for all circuit paths to transit through internal substrate layers.
Innovation Solution
The BGA device is affixed to the bottom surface of the PCB with the cold plate extending through a cutout area to reduce the overall stack height by 'hiding' the depth of the BGA and cold plate within the PCB, allowing for a reduced substrate layer count and decreased cost without compromising performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional BGA packaging is used with all circuit paths transiting through internal substrate layers, then electrical connectivity is achieved, but the overall thickness cannot be reduced and overheating occurs
Solution Approach 1:
The patent changes the routing dimension by allowing circuit paths to transit through the top surface of the substrate rather than exclusively through internal layers. This dimensional change enables shorter signal paths and reduces the need for thick substrates with multiple internal layers, thereby reducing overall thickness while improving thermal management by exposing heat-generating components to the cooler top surface environment.
Solution Approach 2:
The patent extracts the constraint requiring all circuit paths to transit through internal substrate layers. By permitting some circuit paths to route through the top surface, the design removes the necessity for thick substrates with complex internal layer structures, enabling thickness reduction while maintaining electrical connectivity and improving heat dissipation.
2Ease of manufacture
If substrate layer count is reduced to decrease cost, then manufacturing cost is reduced, but circuit path complexity increases
Solution Approach 1:
The patent utilizes the top surface of the substrate as an additional routing dimension for circuit paths. This approach eliminates the need for multiple internal substrate layers, reducing manufacturing complexity and cost, while the increased surface area available for routing compensates for any potential increases in circuit path complexity.
3Length of moving object
If BGA and cold plate depth are hidden within PCB to reduce stack height, then overall thickness is reduced, but thermal contact effectiveness must be maintained
Solution Approach 1:
The patent embeds the BGA and cold plate within the PCB structure, nesting these components inside the PCB thickness rather than stacking them externally. This nesting approach reduces the overall stack height while maintaining effective thermal contact between the cold plate and the die, as the cold plate remains thermally coupled to the heat-generating component within the nested configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the overall thickness of the information handling system while maintaining performance by allowing for reduced substrate layer count and cost savings without overheating issues, as the cold plate's thermal contact with the die ensures effective heat dissipation.
Implementation Method 1
the cold plate's thermal contact with the die ensures effective heat dissipation
Data Source
AI summary
An information handling system includes a printed circuit board (PCB) and an integrated circuit device. The integrated circuit device includes a substrate and a die that is bonded via a first surface of the die to a first surface of the substrate. The substrate includes a ball grid array (BGA) on the first surface of the substrate. The integrated circuit device is bonded to a first surface of the PCB via the BGA. The die is collocated with the cutout area.


