Lead Frame BGA Traces Under Die With Interlocking Standoffs

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Solution Overview

Problem

Current semiconductor packaging technologies face challenges in achieving high I/O density with robustness and cost-effectiveness, as they require multiple etching and plating steps, leading to increased form factor and cost, and often result in peeling issues due to thin packages and additional mounting steps for standoffs.

Innovation Solution

A semiconductor package design featuring routing traces under the die with standoffs formed by plating both sides of a copper substrate, allowing for increased contact density and thermal management, while reducing the number of processing steps and cost through simultaneous plating and etching, and incorporating support structures to prevent peeling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple etching and plating steps are used to achieve high I/O density, then contact density is improved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improvecontact densityVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent combines multiple separate plating steps into a single simultaneous plating operation that forms both the die attach pad plating and the contact lead plating in one process. This merging of operations reduces manufacturing complexity while maintaining high contact density, directly resolving the contradiction between improved contact density and increased manufacturing complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The copper substrate serves multiple functions: it provides the base material for plating, forms the structural support for the package, and creates the standoffs that provide mechanical support and electrical isolation. This multi-functionality reduces the number of separate components and steps needed, thereby reducing manufacturing complexity while achieving high I/O density

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Volume of moving object

If thin packages are used to reduce form factor, then package size is reduced, but robustness deteriorates due to peeling

Engineering Contradiction:
Improvepackage sizeVSAvoidrobustness
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent adds vertical dimension elements (standoffs) to the thin package structure. These standoffs extend upward from the bottom surface of the package, providing mechanical support and preventing peeling without increasing the horizontal footprint. This allows the package to remain thin while gaining robustness through the addition of vertical support structures

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent uses a composite structure combining the copper substrate with plated metal layers and standoff formations. The plated areas provide both electrical functionality and structural reinforcement, creating a composite material system that enhances robustness while maintaining the thin profile of the overall package

Inventive Principle:
Principle #40Composite materials

3Ease of operation

If standoffs are mounted separately to provide gap space, then ease of mounting is improved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improveease of mountingVSAvoidmanufacturing complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The standoffs are integrated into the package structure during the same manufacturing process that forms the contact leads and die attach pad. The copper substrate is etched and plated in a way that automatically creates the standoff structures as part of the overall package geometry, eliminating the need for separate mounting operations

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The standoff structures are pre-formed as integral parts of the package during the plating and etching process, before the package is assembled onto the circuit board. This preliminary formation of standoffs simplifies the subsequent mounting operation, as the standoffs are already in place to provide the necessary gap space and mechanical support

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables a robust, thin, and cost-effective semiconductor package with increased I/O density, reduced peeling risks, and simplified manufacturing, achieving a smaller form factor and improved thermal performance.

Implementation Method 1

a monolithic sheet of copper substrate is selectively plated on both sides to form die attach pads and contacts

Methodology Applied
Scientific EffectElectroplating: Electroplating

Implementation Method 2

When the copper is etched away, the remaining portions between the plated areas form standoffs

Methodology Applied
Scientific EffectChemical etching:

Data Source

PatentUS8460970B1Lead frame ball grid array with traces under die having interlocking features
Publication Date: 2013.06.11 UTAC HEADQUARTERS PTE LTD
  • US8460970B1 patent drawing
  • US8460970B1 patent drawing
  • US8460970B1 patent drawing

AI summary

A package includes a first plated area, a second plated area, a die attached to the first plated area, and a bond coupling the die to the second plated area. The package further includes a molding encapsulating the die, the bond, and the top surfaces of the first and second plated areas, such that the bottom surfaces of the first and second plated areas are exposed exterior to the package. Additional embodiments include a method of making the package.