Bi-directional Data Isolator with Dynamic Clock Frequency
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Solution Overview
Problem
Conventional data isolators transmit data in a static manner, failing to provide flexibility for handling data packets of varying sizes, which results in reduced transmission speed and increased communication overhead due to the need to divide larger data into multiple smaller packets.
Innovation Solution
A bi-directional data isolator with dynamic communication capabilities, where the clock frequency and number of bits transmitted per clock cycle can be adjusted, allowing for variable data packet sizes by altering the duration of clock signal states, enabling larger data to be transmitted in fewer packets and smaller data to be transmitted faster.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a fixed clock frequency is used for data transmission, then the transmission timing is simple and stable, but the transmission speed cannot be optimized for different data packet sizes
Solution Approach 1:
The patent implements dynamic clock frequency adjustment by allowing the clock signal to vary its frequency based on the size of data packets being transmitted. The isolator transitions from a static fixed-frequency system to a dynamic variable-frequency system, where the clock frequency is adjusted in real-time to match transmission requirements, thereby optimizing productivity without excessive complexity
Solution Approach 2:
The patent changes the clock frequency parameter dynamically based on data packet size. By modifying this key parameter, the system achieves variable transmission speeds - higher frequencies for smaller packets and lower frequencies for larger packets - resolving the contradiction between transmission speed and system complexity
2Reliability
If larger data is divided into multiple smaller packets for transmission, then the transmission reliability improves, but the transmission time increases and communication overhead increases
Solution Approach 1:
The patent dynamically adjusts packetization strategy based on data size and transmission requirements. Instead of always dividing data into fixed small packets, the system can transmit larger packets when appropriate, reducing the number of transmission cycles needed while maintaining reliability through adaptive error checking and clock frequency adjustment
Solution Approach 2:
The patent changes the packet size parameter dynamically based on the amount of data to be transmitted. For larger data sets, the system uses larger packet sizes with adjusted clock frequencies, reducing transmission time and overhead while maintaining reliability through adaptive transmission protocols
3Speed
If the clock frequency is increased to transmit smaller data faster, then the transmission speed for small packets improves, but the number of bits transmitted per clock cycle decreases
Solution Approach 1:
The patent implements dynamic clock frequency adjustment that adapts to packet size requirements. For small packets, the clock frequency is increased to achieve faster transmission, while for larger packets, the frequency is optimized to maximize bits per cycle. This dynamic approach resolves the contradiction by allowing the system to optimize for speed when needed and for throughput when needed
Solution Approach 2:
The patent changes the clock frequency parameter based on transmission requirements. By adjusting this parameter dynamically, the system achieves high speeds for small packets through higher frequencies while maintaining high productivity for large packets through optimized frequency-bit combinations
Data Source
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AI summary
Data isolators for providing isolation between two ports that enable dynamic communication are described. The dynamic communication may be achieved by varying a ratio of the data rate relative to a clock frequency of a clock signal. The data isolator may include a first circuit that transmits data across an isolation barrier when the clock signal is in a first state and a second circuit that transmits data across the isolation barrier when the clock signal is in a second state. The clock frequency may be variable and, as a result, change the duration of data transmissions in a given clock cycle. For example, the clock frequency may be reduced to increase the number of bits transmitted per clock cycle and, conversely, increased to reduce the number of bits transmitted per clock cycle. Thus, the number of bits transmitted per clock cycle may be adjusted to suit the situation.