Bi-directional Resistive Memory Offset Compensation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory devices, such as resistive memory devices, face challenges in achieving high memory capacity, speed, and low power consumption while maintaining data non-volatility, particularly in bi-directional resistive memory devices where resistance changes are dependent on both magnitude and direction of voltage and current.
Innovation Solution
A bi-directional resistive memory device is designed with a memory cell array and an input/output (I/O) circuit that generates voltages of positive and negative polarities, adjusts their magnitudes, and uses a variable resistive element with non-ohmic and resistive materials to store data by controlling voltage and current, allowing for efficient writing and reading operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If voltage and current magnitude are increased to improve data writing accuracy, then write precision is improved, but power consumption increases
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting voltage and current magnitudes based on offset detection. The I/O circuit modifies voltage levels during write operations to compensate for offsets, thereby improving data writing accuracy without consistently operating at maximum power levels, thus reducing overall power consumption.
Solution Approach 2:
The patent implements feedback through offset detection and compensation mechanisms. The I/O circuit detects offsets during write operations and adjusts voltage parameters accordingly, creating a closed-loop system that improves accuracy while optimizing power usage by only increasing voltage when necessary.
2Quantity of substance
If bi-directional voltage control is implemented to improve data storage capability, then memory capacity is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing the I/O circuit to perform multiple functions: generating both positive and negative voltages, detecting offsets, and compensating for offsets. This multi-functional approach enables bi-directional voltage control for improved memory capacity while avoiding the need for separate dedicated circuits for each function, thus managing device complexity.
Solution Approach 2:
The patent merges the voltage generation, offset detection, and offset compensation functions into a single integrated I/O circuit. This consolidation allows bi-directional voltage control for enhanced memory capacity while reducing the overall number of discrete components and control logic required, thereby managing device complexity.
3Measurement precision
If voltage magnitude adjustment is performed to compensate for offset, then data accuracy is improved, but operation time increases
Solution Approach 1:
The patent applies preliminary action by detecting offsets during the write operation itself rather than after. The I/O circuit performs offset detection and compensation in real-time during the write process, allowing voltage magnitude adjustment to be made proactively. This ensures data accuracy is maintained while minimizing the time penalty by avoiding post-write correction operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables efficient data storage and retrieval in bi-directional resistive memory devices by effectively managing voltage polarities and magnitudes, compensating for offsets during write operations, thereby enhancing memory capacity, speed, and reducing power consumption.
Implementation Method 1
resistive memory devices where resistance changes are dependent on both magnitude and direction of voltage and current
Implementation Method 2
a first element including non-ohmic material and a second element including resistive material connected in series
Data Source
AI summary
A bi-directional resistive memory device includes a memory cell array including a plurality of memory cells and an input/output (I/O) circuit. The I/O circuit is configured to generate a first voltage having a positive polarity and a second voltage having a negative polarity, provide one of the first voltage and the second voltage to the memory cell array through a bitline responsive to a logic state of input data, and adjust magnitudes of the first and second voltage when data written in the memory cell array has an offset. Related memory systems and methods are also provided.