Bi-directional ring control for power semiconductor current balancing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for current balancing in parallel-connected power semiconductors are complex, costly, and prone to resonance issues, requiring intricate communication and delay calculations to synchronize switching times, which increases system complexity and costs.
Innovation Solution
A bi-directional ring communication structure where a central control unit sends control information to multiple power semiconductor units, allowing each unit to calculate a midpoint for control operations based on simultaneous receipt from both directions, eliminating the need for units to communicate delay times and simplifying synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate output filters are provided for each power semiconductor, then current balancing is improved, but device complexity and cost increase
Solution Approach 1:
The patent extracts the filtering function from separate physical filters and implements it through a centralized digital signal processing approach in the controller. The controller receives current signals from all parallel branches, digitally filters these signals, and generates control signals accordingly, eliminating the need for separate analog filters for each power semiconductor branch.
Solution Approach 2:
The controller is designed to perform multiple functions: it controls the switching of power semiconductors, filters current signals from multiple branches, and generates synchronized control signals. This multi-functional approach replaces the need for separate filters and control circuits for each branch, reducing overall system complexity.
2Reliability
If matching power semiconductors are selected, then current balancing is improved, but manufacturing cost and replacement difficulty increase
Solution Approach 1:
The patent measures the actual switching characteristics (turn-on and turn-off times) of each power semiconductor and uses these measured parameters to calculate individual delay times. This approach replaces the need for manual matching and selection of semiconductors with identical parameters, allowing the use of components with varying characteristics while achieving balanced current distribution through software-based compensation.
3Ease of operation
If timing information is distributed through star topology with CCU, then control is simplified, but communication delays cause desynchronization
Solution Approach 1:
The patent implements a feedback mechanism where the controller receives actual current signals from all parallel branches, measures their timing characteristics, and uses this feedback information to calculate appropriate delay times for each branch. This closed-loop approach compensates for communication delays and ensures synchronized switching despite variations in signal transmission times.
Solution Approach 2:
The controller pre-calculates individual delay times for each power semiconductor branch based on measured switching characteristics before actual operation. These pre-calculated delay values are stored and applied to synchronize the switching of all branches, ensuring that synchronization is achieved in advance rather than requiring real-time adjustment during operation.
4Ease of operation
If chain or ring topology is used for timing distribution, then communication path is established, but delay increases towards end units
Solution Approach 1:
The patent equalizes the effective communication delay for all power semiconductor branches by calculating individual delay compensation values based on each branch's position and characteristics. The controller adjusts the control signal timing for each branch so that all branches experience equivalent total delay (communication delay + calculated delay), ensuring simultaneous switching despite different physical distances from the controller.
Data Source
Figure 1~2
Figure 3
Figure 4
AI summary
Method and arrangement of balancing currents of power semiconductors comprising multiple power semiconductor units (PSU) and a central control unit (CCU), each power semiconductor unit (PSU) comprising a power semiconductor and the central control unit and the power semiconductor units being arranged in a bi-directional ring, in which the central control unit sends control information for the power semiconductor units to both directions in the bi-directional ring and each power semiconductor unit receives the control information from both directions and forwards the received control information. In the method each power semiconductor unit processes steps of receiving the control information from the first direction at a first time instant (T_1), receiving the control information from the second direction at a second time instant (T_2), calculating a midpoint (T_IN) between the first and the second time instants, and controlling the power semiconductor component according to the control information after a time delay (T_ADD) after the calculated midpoint has elapsed.